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Input: i8042 - skip selftest on ASUS laptops
On suspend/resume cycle, selftest is executed to reset i8042 controller. But when this is done in Asus devices, subsequent calls to detect/init functions to elantech driver fails. Skipping selftest fixes this problem. An easier step to reproduce this problem is adding i8042.reset=1 as a kernel parameter. On Asus laptops, it'll make the system to start with the touchpad already stuck, since psmouse_probe forcibly calls the selftest function. This patch was inspired by John Hiesey's change[1], but, since this problem affects a lot of models of Asus, let's avoid running selftests on them. All models affected by this problem: A455LD K401LB K501LB K501LX R409L V502LX X302LA X450LCP X450LD X455LAB X455LDB X455LF Z450LA [1]: https://marc.info/?l=linux-input&m=144312209020616&w=2 Fixes: "ETPS/2 Elantech Touchpad dies after resume from suspend" (https://bugzilla.kernel.org/show_bug.cgi?id=107971) Signed-off-by: Marcos Paulo de Souza <marcos.souza.org@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
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@ -1409,7 +1409,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
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i8042.nopnp [HW] Don't use ACPIPnP / PnPBIOS to discover KBD/AUX
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controllers
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i8042.notimeout [HW] Ignore timeout condition signalled by controller
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i8042.reset [HW] Reset the controller during init and cleanup
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i8042.reset [HW] Reset the controller during init, cleanup and
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suspend-to-ram transitions, only during s2r
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transitions, or never reset
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Format: { 1 | Y | y | 0 | N | n }
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1, Y, y: always reset controller
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0, N, n: don't ever reset controller
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Default: only on s2r transitions on x86; most other
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architectures force reset to be always executed
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i8042.unlock [HW] Unlock (ignore) the keylock
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i8042.kbdreset [HW] Reset device connected to KBD port
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@ -81,7 +81,7 @@ static inline int i8042_platform_init(void)
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return -EBUSY;
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#endif
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i8042_reset = 1;
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i8042_reset = I8042_RESET_ALWAYS;
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return 0;
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}
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@ -61,7 +61,7 @@ static inline int i8042_platform_init(void)
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return -EBUSY;
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#endif
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i8042_reset = 1;
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i8042_reset = I8042_RESET_ALWAYS;
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return 0;
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}
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@ -44,7 +44,7 @@ static inline void i8042_write_command(int val)
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static inline int i8042_platform_init(void)
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{
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i8042_reset = 1;
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i8042_reset = I8042_RESET_ALWAYS;
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return 0;
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}
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@ -130,7 +130,7 @@ static int __init i8042_platform_init(void)
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}
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}
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i8042_reset = 1;
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i8042_reset = I8042_RESET_ALWAYS;
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return 0;
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}
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@ -61,7 +61,7 @@ static inline int i8042_platform_init(void)
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if (!request_mem_region(I8042_REGION_START, I8042_REGION_SIZE, "i8042"))
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return -EBUSY;
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i8042_reset = 1;
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i8042_reset = I8042_RESET_ALWAYS;
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return 0;
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}
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@ -510,6 +510,90 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = {
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{ }
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};
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/*
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* On some Asus laptops, just running self tests cause problems.
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*/
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static const struct dmi_system_id i8042_dmi_noselftest_table[] = {
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "A455LD"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "K401LB"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "K501LB"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "K501LX"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "R409L"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "V502LX"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "X302LA"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "X450LCP"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "X450LD"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "X455LAB"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "X455LDB"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "X455LF"),
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},
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},
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{
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Z450LA"),
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},
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},
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{ }
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};
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static const struct dmi_system_id __initconst i8042_dmi_reset_table[] = {
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{
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/* MSI Wind U-100 */
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@ -1072,12 +1156,18 @@ static int __init i8042_platform_init(void)
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return retval;
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#if defined(__ia64__)
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i8042_reset = true;
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i8042_reset = I8042_RESET_ALWAYS;
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#endif
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#ifdef CONFIG_X86
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if (dmi_check_system(i8042_dmi_reset_table))
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i8042_reset = true;
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/* Honor module parameter when value is not default */
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if (i8042_reset == I8042_RESET_DEFAULT) {
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if (dmi_check_system(i8042_dmi_reset_table))
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i8042_reset = I8042_RESET_ALWAYS;
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if (dmi_check_system(i8042_dmi_noselftest_table))
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i8042_reset = I8042_RESET_NEVER;
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}
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if (dmi_check_system(i8042_dmi_noloop_table))
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i8042_noloop = true;
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@ -48,9 +48,39 @@ static bool i8042_unlock;
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module_param_named(unlock, i8042_unlock, bool, 0);
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MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
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static bool i8042_reset;
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module_param_named(reset, i8042_reset, bool, 0);
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MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
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enum i8042_controller_reset_mode {
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I8042_RESET_NEVER,
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I8042_RESET_ALWAYS,
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I8042_RESET_ON_S2RAM,
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#define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM
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};
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static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT;
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static int i8042_set_reset(const char *val, const struct kernel_param *kp)
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{
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enum i8042_controller_reset_mode *arg = kp->arg;
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int error;
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bool reset;
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if (val) {
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error = kstrtobool(val, &reset);
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if (error)
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return error;
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} else {
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reset = true;
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}
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*arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER;
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return 0;
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}
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static const struct kernel_param_ops param_ops_reset_param = {
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.flags = KERNEL_PARAM_OPS_FL_NOARG,
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.set = i8042_set_reset,
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};
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#define param_check_reset_param(name, p) \
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__param_check(name, p, enum i8042_controller_reset_mode)
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module_param_named(reset, i8042_reset, reset_param, 0);
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MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both");
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static bool i8042_direct;
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module_param_named(direct, i8042_direct, bool, 0);
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@ -1019,7 +1049,7 @@ static int i8042_controller_init(void)
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* Reset the controller and reset CRT to the original value set by BIOS.
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*/
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static void i8042_controller_reset(bool force_reset)
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static void i8042_controller_reset(bool s2r_wants_reset)
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{
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i8042_flush();
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@ -1044,8 +1074,10 @@ static void i8042_controller_reset(bool force_reset)
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* Reset the controller if requested.
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*/
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if (i8042_reset || force_reset)
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if (i8042_reset == I8042_RESET_ALWAYS ||
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(i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
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i8042_controller_selftest();
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}
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/*
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* Restore the original control register setting.
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@ -1110,7 +1142,7 @@ static void i8042_dritek_enable(void)
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* before suspending.
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*/
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static int i8042_controller_resume(bool force_reset)
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static int i8042_controller_resume(bool s2r_wants_reset)
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{
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int error;
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@ -1118,7 +1150,8 @@ static int i8042_controller_resume(bool force_reset)
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if (error)
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return error;
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if (i8042_reset || force_reset) {
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if (i8042_reset == I8042_RESET_ALWAYS ||
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(i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) {
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error = i8042_controller_selftest();
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if (error)
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return error;
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@ -1195,7 +1228,7 @@ static int i8042_pm_resume_noirq(struct device *dev)
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static int i8042_pm_resume(struct device *dev)
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{
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bool force_reset;
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bool want_reset;
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int i;
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for (i = 0; i < I8042_NUM_PORTS; i++) {
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@ -1218,9 +1251,9 @@ static int i8042_pm_resume(struct device *dev)
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* off control to the platform firmware, otherwise we can simply restore
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* the mode.
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*/
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force_reset = pm_resume_via_firmware();
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want_reset = pm_resume_via_firmware();
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return i8042_controller_resume(force_reset);
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return i8042_controller_resume(want_reset);
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}
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static int i8042_pm_thaw(struct device *dev)
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@ -1481,7 +1514,7 @@ static int __init i8042_probe(struct platform_device *dev)
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i8042_platform_device = dev;
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if (i8042_reset) {
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if (i8042_reset == I8042_RESET_ALWAYS) {
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error = i8042_controller_selftest();
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if (error)
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return error;
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