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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
This commit is contained in:
Linus Torvalds
commit
91aa9fb573
@ -764,6 +764,7 @@ config BLK_DEV_IDE_PMAC_ATA100FIRST
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config BLK_DEV_IDEDMA_PMAC
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bool "PowerMac IDE DMA support"
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depends on BLK_DEV_IDE_PMAC
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select BLK_DEV_IDEDMA_PCI
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help
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This option allows the driver for the built-in IDE controller on
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Power Macintoshes and PowerBooks to use DMA (direct memory access)
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@ -317,7 +317,7 @@ typedef struct ide_floppy_obj {
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unsigned long flags;
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} idefloppy_floppy_t;
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#define IDEFLOPPY_TICKS_DELAY 3 /* default delay for ZIP 100 */
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#define IDEFLOPPY_TICKS_DELAY HZ/20 /* default delay for ZIP 100 (50ms) */
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/*
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* Floppy flag bits values.
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@ -173,6 +173,12 @@ static ide_pci_device_t generic_chipsets[] __devinitdata = {
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.channels = 2,
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.autodma = NOAUTODMA,
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.bootable = ON_BOARD,
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},{ /* 14 */
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.name = "Revolution",
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.init_hwif = init_hwif_generic,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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}
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};
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@ -231,6 +237,7 @@ static struct pci_device_id generic_pci_tbl[] = {
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{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11},
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{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12},
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{ PCI_VENDOR_ID_TOSHIBA,PCI_DEVICE_ID_TOSHIBA_PICCOLO_2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 13},
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{ PCI_VENDOR_ID_NETCELL,PCI_DEVICE_ID_REVOLUTION, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 14},
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/* Must come last. If you add entries adjust this table appropriately and the init_one code */
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xFFFFFF00UL, 0},
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{ 0, },
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@ -21,6 +21,9 @@
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*
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* CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
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*
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* HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
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* controller same as the CSB6. Single channel ATA100 only.
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*
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* Documentation:
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* Available under NDA only. Errata info very hard to get.
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*
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@ -71,6 +74,8 @@ static u8 svwks_ratemask (ide_drive_t *drive)
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if (!svwks_revision)
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pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
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if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
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return 2;
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if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
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u32 reg = 0;
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if (isa_dev)
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@ -109,6 +114,7 @@ static u8 svwks_csb_check (struct pci_dev *dev)
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case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
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case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
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case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
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case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
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return 1;
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default:
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break;
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@ -438,6 +444,13 @@ static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const cha
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btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
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pci_write_config_byte(dev, 0x5A, btr);
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}
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/* Setup HT1000 SouthBridge Controller - Single Channel Only */
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else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
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pci_read_config_byte(dev, 0x5A, &btr);
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btr &= ~0x40;
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btr |= 0x3;
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pci_write_config_byte(dev, 0x5A, btr);
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}
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return (dev->irq) ? dev->irq : 0;
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}
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@ -629,6 +642,15 @@ static ide_pci_device_t serverworks_chipsets[] __devinitdata = {
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.channels = 1, /* 2 */
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.autodma = AUTODMA,
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.bootable = ON_BOARD,
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},{ /* 4 */
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.name = "SvrWks HT1000",
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.init_setup = init_setup_svwks,
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.init_chipset = init_chipset_svwks,
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.init_hwif = init_hwif_svwks,
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.init_dma = init_dma_svwks,
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.channels = 1, /* 2 */
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.autodma = AUTODMA,
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.bootable = ON_BOARD,
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}
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};
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@ -653,6 +675,7 @@ static struct pci_device_id svwks_pci_tbl[] = {
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{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
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{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
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{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
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{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
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@ -1664,7 +1664,7 @@ static struct macio_driver pmac_ide_macio_driver =
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};
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static struct pci_device_id pmac_ide_pci_match[] = {
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{ PCI_VENDOR_ID_APPLE, PCI_DEVIEC_ID_APPLE_UNI_N_ATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_UNI_N_ATA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_IPID_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_K2_ATA100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{ PCI_VENDOR_ID_APPLE, PCI_DEVICE_ID_APPLE_SH_ATA,
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@ -229,6 +229,7 @@ static unsigned long ide_get_or_set_dma_base (ide_hwif_t *hwif)
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case PCI_DEVICE_ID_AMD_VIPER_7409:
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case PCI_DEVICE_ID_CMD_643:
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case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
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case PCI_DEVICE_ID_REVOLUTION:
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simplex_stat = hwif->INB(dma_base + 2);
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hwif->OUTB((simplex_stat&0x60),(dma_base + 2));
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simplex_stat = hwif->INB(dma_base + 2);
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@ -881,7 +881,7 @@
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#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
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#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
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#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
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#define PCI_DEVIEC_ID_APPLE_UNI_N_ATA 0x0033
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#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033
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#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034
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#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b
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#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e
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@ -1580,6 +1580,7 @@
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#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211
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#define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212
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#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213
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#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214
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#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
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#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
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#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB
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@ -2184,6 +2185,9 @@
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#define PCI_VENDOR_ID_SIBYTE 0x166d
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#define PCI_DEVICE_ID_BCM1250_HT 0x0002
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#define PCI_VENDOR_ID_NETCELL 0x169c
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#define PCI_DEVICE_ID_REVOLUTION 0x0044
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#define PCI_VENDOR_ID_LINKSYS 0x1737
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#define PCI_DEVICE_ID_LINKSYS_EG1032 0x1032
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#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064
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