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drm/i915: Convert wait_for(I915_READ(reg)) to intel_wait_for_register()
By using the out-of-line intel_wait_for_register() not only do we can efficiency from using the hybrid wait_for() contained within, but we avoid code bloat from the numerous inlined loops, in total (all patches): text data bss dec hex filename 1078551 4557 416 1083524 108884 drivers/gpu/drm/i915/i915.ko 1070775 4557 416 1075748 106a24 drivers/gpu/drm/i915/i915.ko Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1467297225-21379-52-git-send-email-chris@chris-wilson.co.uk
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@ -1218,7 +1218,6 @@ static void assert_chv_phy_status(struct drm_i915_private *dev_priv)
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u32 phy_control = dev_priv->chv_phy_control;
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u32 phy_status = 0;
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u32 phy_status_mask = 0xffffffff;
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u32 tmp;
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/*
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* The BIOS can leave the PHY is some weird state
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@ -1306,10 +1305,14 @@ static void assert_chv_phy_status(struct drm_i915_private *dev_priv)
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* The PHY may be busy with some initial calibration and whatnot,
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* so the power state can take a while to actually change.
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*/
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if (wait_for((tmp = I915_READ(DISPLAY_PHY_STATUS) & phy_status_mask) == phy_status, 10))
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WARN(phy_status != tmp,
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"Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",
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tmp, phy_status, dev_priv->chv_phy_control);
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if (intel_wait_for_register(dev_priv,
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DISPLAY_PHY_STATUS,
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phy_status_mask,
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phy_status,
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10))
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DRM_ERROR("Unexpected PHY_STATUS 0x%08x, expected 0x%08x (PHY_CONTROL=0x%08x)\n",
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I915_READ(DISPLAY_PHY_STATUS) & phy_status_mask,
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phy_status, dev_priv->chv_phy_control);
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}
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#undef BITS_SET
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