mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 18:20:52 +07:00
Merge branch 'pci/resource' into next
* pci/resource: microblaze/PCI: Remove pcibios_setup_bus_{self/devices} dead code ARC: Remove empty kernel/pcibios.c PCI: Add a generic weak pcibios_align_resource() PCI: Add a generic weak pcibios_fixup_bus()
This commit is contained in:
commit
9198407e23
@ -12,7 +12,6 @@ obj-y := arcksyms.o setup.o irq.o reset.o ptrace.o process.o devtree.o
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obj-y += signal.o traps.o sys.o troubleshoot.o stacktrace.o disasm.o
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obj-$(CONFIG_ISA_ARCOMPACT) += entry-compact.o intc-compact.o
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obj-$(CONFIG_ISA_ARCV2) += entry-arcv2.o intc-arcv2.o
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obj-$(CONFIG_PCI) += pcibios.o
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obj-$(CONFIG_MODULES) += arcksyms.o module.o
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obj-$(CONFIG_SMP) += smp.o
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@ -1,22 +0,0 @@
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/*
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* Copyright (C) 2014-2015 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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/*
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* We don't have to worry about legacy ISA devices, so nothing to do here
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*/
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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}
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@ -22,23 +22,6 @@
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#include <linux/pci-ecam.h>
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#include <linux/slab.h>
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/*
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* Called after each bus is probed, but before its children are examined
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*/
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* nothing to do, expected to be removed in the future */
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}
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/*
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* We don't have to worry about legacy ISA devices, so nothing to do here
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*/
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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#ifdef CONFIG_ACPI
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/*
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* Try to assign the IRQ number when probing a new device
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@ -2,10 +2,6 @@
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#include <linux/kernel.h>
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#include <hwregs/intr_vect.h>
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void pcibios_fixup_bus(struct pci_bus *b)
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{
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}
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void pcibios_set_master(struct pci_dev *dev)
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{
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u8 lat;
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@ -411,13 +411,6 @@ pcibios_disable_device (struct pci_dev *dev)
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acpi_pci_irq_disable(dev);
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}
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resource_size_t
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pcibios_align_resource (void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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/**
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* ia64_pci_get_legacy_mem - generic legacy mem routine
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* @bus: bus to get legacy memory base address for
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@ -81,9 +81,6 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file,
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#define HAVE_ARCH_PCI_RESOURCE_TO_USER
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extern void pcibios_setup_bus_devices(struct pci_bus *bus);
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extern void pcibios_setup_bus_self(struct pci_bus *bus);
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/* This part of code was originally in xilinx-pci.h */
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#ifdef CONFIG_PCI_XILINX
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extern void __init xilinx_pci_init(void);
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@ -678,144 +678,6 @@ static void pcibios_fixup_resources(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
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/* This function tries to figure out if a bridge resource has been initialized
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* by the firmware or not. It doesn't have to be absolutely bullet proof, but
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* things go more smoothly when it gets it right. It should covers cases such
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* as Apple "closed" bridge resources and bare-metal pSeries unassigned bridges
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*/
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static int pcibios_uninitialized_bridge_resource(struct pci_bus *bus,
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struct resource *res)
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{
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struct pci_controller *hose = pci_bus_to_host(bus);
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struct pci_dev *dev = bus->self;
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resource_size_t offset;
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u16 command;
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int i;
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/* Job is a bit different between memory and IO */
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if (res->flags & IORESOURCE_MEM) {
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/* If the BAR is non-0 (res != pci_mem_offset) then it's
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* probably been initialized by somebody
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*/
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if (res->start != hose->pci_mem_offset)
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return 0;
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/* The BAR is 0, let's check if memory decoding is enabled on
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* the bridge. If not, we consider it unassigned
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*/
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pci_read_config_word(dev, PCI_COMMAND, &command);
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if ((command & PCI_COMMAND_MEMORY) == 0)
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return 1;
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/* Memory decoding is enabled and the BAR is 0. If any of
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* the bridge resources covers that starting address (0 then
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* it's good enough for us for memory
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*/
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for (i = 0; i < 3; i++) {
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if ((hose->mem_resources[i].flags & IORESOURCE_MEM) &&
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hose->mem_resources[i].start == hose->pci_mem_offset)
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return 0;
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}
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/* Well, it starts at 0 and we know it will collide so we may as
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* well consider it as unassigned. That covers the Apple case.
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*/
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return 1;
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} else {
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/* If the BAR is non-0, then we consider it assigned */
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offset = (unsigned long)hose->io_base_virt - _IO_BASE;
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if (((res->start - offset) & 0xfffffffful) != 0)
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return 0;
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/* Here, we are a bit different than memory as typically IO
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* space starting at low addresses -is- valid. What we do
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* instead if that we consider as unassigned anything that
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* doesn't have IO enabled in the PCI command register,
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* and that's it.
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*/
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pci_read_config_word(dev, PCI_COMMAND, &command);
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if (command & PCI_COMMAND_IO)
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return 0;
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/* It's starting at 0 and IO is disabled in the bridge, consider
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* it unassigned
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*/
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return 1;
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}
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}
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/* Fixup resources of a PCI<->PCI bridge */
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static void pcibios_fixup_bridge(struct pci_bus *bus)
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{
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struct resource *res;
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int i;
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struct pci_dev *dev = bus->self;
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pci_bus_for_each_resource(bus, res, i) {
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if (!res)
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continue;
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if (!res->flags)
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continue;
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if (i >= 3 && bus->self->transparent)
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continue;
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pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n",
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pci_name(dev), i,
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(unsigned long long)res->start,
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(unsigned long long)res->end,
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(unsigned int)res->flags);
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/* Try to detect uninitialized P2P bridge resources,
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* and clear them out so they get re-assigned later
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*/
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if (pcibios_uninitialized_bridge_resource(bus, res)) {
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res->flags = 0;
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pr_debug("PCI:%s (unassigned)\n",
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pci_name(dev));
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} else {
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pr_debug("PCI:%s %016llx-%016llx\n",
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pci_name(dev),
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(unsigned long long)res->start,
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(unsigned long long)res->end);
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}
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}
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}
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void pcibios_setup_bus_self(struct pci_bus *bus)
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{
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/* Fix up the bus resources for P2P bridges */
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if (bus->self != NULL)
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pcibios_fixup_bridge(bus);
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}
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void pcibios_setup_bus_devices(struct pci_bus *bus)
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{
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struct pci_dev *dev;
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pr_debug("PCI: Fixup bus devices %d (%s)\n",
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bus->number, bus->self ? pci_name(bus->self) : "PHB");
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list_for_each_entry(dev, &bus->devices, bus_list) {
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/* Setup OF node pointer in archdata */
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dev->dev.of_node = pci_device_to_OF_node(dev);
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/* Fixup NUMA node as it may not be setup yet by the generic
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* code and is needed by the DMA init
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*/
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set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
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/* Read default IRQs and fixup if necessary */
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dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
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}
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}
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* nothing to do */
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}
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EXPORT_SYMBOL(pcibios_fixup_bus);
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/*
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* We need to avoid collisions with `mirrored' VGA ports
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* and other strange ISA hardware, so we always want the
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@ -829,13 +691,6 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
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* but we want to try to avoid allocating at 0x2900-0x2bff
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* which might have be mirrored at 0x0100-0x03ff..
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*/
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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EXPORT_SYMBOL(pcibios_align_resource);
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int pcibios_add_device(struct pci_dev *dev)
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{
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dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
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@ -262,10 +262,6 @@ static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
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return rc;
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}
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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}
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size,
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resource_size_t align)
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@ -163,14 +163,6 @@ static int __init pcibios_init(void)
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}
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subsys_initcall(pcibios_init);
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/*
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* Called after each bus is probed, but before its children
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* are examined.
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*/
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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}
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/*
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* We need to avoid collisions with `mirrored' VGA ports
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* and other strange ISA hardware, so we always want the
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@ -106,9 +106,3 @@ void pcibios_fixup_bus(struct pci_bus *pbus)
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}
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}
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}
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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@ -690,16 +690,6 @@ struct pci_bus *pci_scan_one_pbm(struct pci_pbm_info *pbm,
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return bus;
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}
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void pcibios_fixup_bus(struct pci_bus *pbus)
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{
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}
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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u16 cmd, oldcmd;
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@ -746,12 +746,6 @@ static void watchdog_reset() {
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}
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#endif
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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int pcibios_enable_device(struct pci_dev *pdev, int mask)
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{
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return 0;
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@ -66,16 +66,6 @@ static int pci_scan_flags[TILE_NUM_PCIE];
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static struct pci_ops tile_cfg_ops;
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/*
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* We don't need to worry about the alignment of resources.
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*/
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size, resource_size_t align)
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{
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return res->start;
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}
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EXPORT_SYMBOL(pcibios_align_resource);
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/*
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* Open a FD to the hypervisor PCI device.
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*
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@ -380,14 +370,6 @@ int __init pcibios_init(void)
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}
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subsys_initcall(pcibios_init);
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/*
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* No bus fixups needed.
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*/
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* Nothing needs to be done. */
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}
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void pcibios_set_master(struct pci_dev *dev)
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{
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/* No special bus mastering setup handling. */
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@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops;
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/* Mask of CPUs that should receive PCIe interrupts. */
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static struct cpumask intr_cpus_map;
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/* We don't need to worry about the alignment of resources. */
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resource_size_t pcibios_align_resource(void *data, const struct resource *res,
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resource_size_t size,
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resource_size_t align)
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{
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return res->start;
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}
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EXPORT_SYMBOL(pcibios_align_resource);
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/*
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* Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #.
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* For now, we simply send interrupts to non-dataplane CPUs.
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@ -1049,11 +1040,6 @@ int __init pcibios_init(void)
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}
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subsys_initcall(pcibios_init);
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/* No bus fixups needed. */
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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}
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/* Process any "pci=" kernel boot arguments. */
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char *__init pcibios_setup(char *str)
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{
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@ -2344,6 +2344,15 @@ void pcie_bus_configure_settings(struct pci_bus *bus)
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}
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EXPORT_SYMBOL_GPL(pcie_bus_configure_settings);
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/*
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* Called after each bus is probed, but before its children are examined. This
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* is marked as __weak because multiple architectures define it.
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*/
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void __weak pcibios_fixup_bus(struct pci_bus *bus)
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{
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/* nothing to do, expected to be removed in the future */
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}
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unsigned int pci_scan_child_bus(struct pci_bus *bus)
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{
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unsigned int devfn, pass, max = bus->busn_res.start;
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|
@ -234,6 +234,19 @@ static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
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return 0;
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}
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/*
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* We don't have to worry about legacy ISA devices, so nothing to do here.
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* This is marked as __weak because multiple architectures define it; it should
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* eventually go away.
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*/
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resource_size_t __weak pcibios_align_resource(void *data,
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const struct resource *res,
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resource_size_t size,
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resource_size_t align)
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{
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return res->start;
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}
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static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
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int resno, resource_size_t size, resource_size_t align)
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{
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Block a user