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drm/amd/display: add pipe split disable regkey

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Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2017-06-16 11:27:59 -04:00 committed by Alex Deucher
parent f19d5f3520
commit 90f095c13e
3 changed files with 4 additions and 4 deletions
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2
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
View File

@ -791,7 +791,7 @@ bool dcn_validate_bandwidth(
v->phyclk_per_state[1] = v->phyclkv_mid0p72;
v->phyclk_per_state[0] = v->phyclkv_min0p65;
if (dc->public.debug.use_max_voltage) {
if (dc->public.debug.disable_pipe_split) {
v->max_dppclk[1] = v->max_dppclk_vnom0p8;
v->max_dppclk[0] = v->max_dppclk_vnom0p8;
}

2
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -170,7 +170,7 @@ struct dc_debug {
bool disable_hubp_power_gate;
bool disable_pplib_wm_range;
bool use_dml_wm;
bool use_max_voltage;
bool disable_pipe_split;
int sr_exit_time_ns;
int sr_enter_plus_exit_time_ns;
int urgent_latency_ns;

4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
View File

@ -443,7 +443,7 @@ static const struct dc_debug debug_defaults_drv = {
.disable_pplib_wm_range = false,
#if defined(CONFIG_DRM_AMD_DC_DCN1_0)
.use_dml_wm = false,
.use_max_voltage = false
.disable_pipe_split = false
#endif
};
@ -456,7 +456,7 @@ static const struct dc_debug debug_defaults_diags = {
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,
.use_dml_wm = false,
.use_max_voltage = false
.disable_pipe_split = false
#endif
};