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drm/amdgpu: use LRU mapping policy for SDMA engines
Spreading the load across multiple SDMA engines can increase memory transfer performance. Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -276,7 +276,6 @@ int amdgpu_queue_mgr_map(struct amdgpu_device *adev,
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switch (mapper->hw_ip) {
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case AMDGPU_HW_IP_GFX:
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case AMDGPU_HW_IP_DMA:
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case AMDGPU_HW_IP_UVD:
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case AMDGPU_HW_IP_VCE:
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case AMDGPU_HW_IP_UVD_ENC:
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@ -284,6 +283,7 @@ int amdgpu_queue_mgr_map(struct amdgpu_device *adev,
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case AMDGPU_HW_IP_VCN_ENC:
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r = amdgpu_identity_map(adev, mapper, ring, out_ring);
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break;
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case AMDGPU_HW_IP_DMA:
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case AMDGPU_HW_IP_COMPUTE:
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r = amdgpu_lru_map(adev, mapper, ring, out_ring);
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break;
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