mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 13:30:57 +07:00
vfio-pci: Cleanup BAR access
We can actually handle MMIO and I/O port from the same access function since PCI already does abstraction of this. The ROM BAR only requires a minor difference, so it gets included too. vfio_pci_config_readwrite gets renamed for consistency. Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
This commit is contained in:
Alex Williamson
parent
5b279a11d3
commit
906ee99dd2
@ -371,31 +371,21 @@ static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
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{
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unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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struct vfio_pci_device *vdev = device_data;
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struct pci_dev *pdev = vdev->pdev;
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if (index >= VFIO_PCI_NUM_REGIONS)
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return -EINVAL;
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switch (index) {
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case VFIO_PCI_CONFIG_REGION_INDEX:
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return vfio_pci_config_readwrite(vdev, buf, count,
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ppos, iswrite);
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return vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);
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case VFIO_PCI_ROM_REGION_INDEX:
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if (iswrite)
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return -EINVAL;
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return vfio_pci_mem_readwrite(vdev, buf, count, ppos, false);
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return vfio_pci_bar_rw(vdev, buf, count, ppos, false);
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case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
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{
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unsigned long flags = pci_resource_flags(pdev, index);
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if (flags & IORESOURCE_IO)
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return vfio_pci_io_readwrite(vdev, buf, count,
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ppos, iswrite);
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if (flags & IORESOURCE_MEM)
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return vfio_pci_mem_readwrite(vdev, buf, count,
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ppos, iswrite);
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}
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return vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);
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}
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return -EINVAL;
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@ -404,13 +394,19 @@ static ssize_t vfio_pci_rw(void *device_data, char __user *buf,
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static ssize_t vfio_pci_read(void *device_data, char __user *buf,
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size_t count, loff_t *ppos)
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{
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if (!count)
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return 0;
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return vfio_pci_rw(device_data, buf, count, ppos, false);
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}
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static ssize_t vfio_pci_write(void *device_data, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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return vfio_pci_rw(device_data, buf, count, ppos, true);
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if (!count)
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return 0;
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return vfio_pci_rw(device_data, (char __user *)buf, count, ppos, true);
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}
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static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
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@ -1501,9 +1501,8 @@ static ssize_t vfio_config_do_rw(struct vfio_pci_device *vdev, char __user *buf,
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return ret;
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}
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ssize_t vfio_pci_config_readwrite(struct vfio_pci_device *vdev,
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char __user *buf, size_t count,
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loff_t *ppos, bool iswrite)
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ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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{
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size_t done = 0;
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int ret = 0;
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@ -70,15 +70,12 @@ extern int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev,
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uint32_t flags, unsigned index,
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unsigned start, unsigned count, void *data);
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extern ssize_t vfio_pci_config_readwrite(struct vfio_pci_device *vdev,
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char __user *buf, size_t count,
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loff_t *ppos, bool iswrite);
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extern ssize_t vfio_pci_mem_readwrite(struct vfio_pci_device *vdev,
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char __user *buf, size_t count,
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loff_t *ppos, bool iswrite);
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extern ssize_t vfio_pci_io_readwrite(struct vfio_pci_device *vdev,
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char __user *buf, size_t count,
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loff_t *ppos, bool iswrite);
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extern ssize_t vfio_pci_config_rw(struct vfio_pci_device *vdev,
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char __user *buf, size_t count,
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loff_t *ppos, bool iswrite);
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extern ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite);
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extern int vfio_pci_init_perm_bits(void);
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extern void vfio_pci_uninit_perm_bits(void);
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@ -20,205 +20,57 @@
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#include "vfio_pci_private.h"
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/* I/O Port BAR access */
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ssize_t vfio_pci_io_readwrite(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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{
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struct pci_dev *pdev = vdev->pdev;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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void __iomem *io;
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size_t done = 0;
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if (!pci_resource_start(pdev, bar))
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return -EINVAL;
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if (pos + count > pci_resource_len(pdev, bar))
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return -EINVAL;
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if (!vdev->barmap[bar]) {
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int ret;
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ret = pci_request_selected_regions(pdev, 1 << bar, "vfio");
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if (ret)
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return ret;
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vdev->barmap[bar] = pci_iomap(pdev, bar, 0);
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if (!vdev->barmap[bar]) {
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pci_release_selected_regions(pdev, 1 << bar);
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return -EINVAL;
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}
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}
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io = vdev->barmap[bar];
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while (count) {
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int filled;
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if (count >= 3 && !(pos % 4)) {
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__le32 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 4))
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return -EFAULT;
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iowrite32(le32_to_cpu(val), io + pos);
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} else {
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val = cpu_to_le32(ioread32(io + pos));
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if (copy_to_user(buf, &val, 4))
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return -EFAULT;
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}
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filled = 4;
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} else if ((pos % 2) == 0 && count >= 2) {
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__le16 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 2))
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return -EFAULT;
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iowrite16(le16_to_cpu(val), io + pos);
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} else {
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val = cpu_to_le16(ioread16(io + pos));
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if (copy_to_user(buf, &val, 2))
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return -EFAULT;
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}
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filled = 2;
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} else {
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u8 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 1))
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return -EFAULT;
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iowrite8(val, io + pos);
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} else {
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val = ioread8(io + pos);
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if (copy_to_user(buf, &val, 1))
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return -EFAULT;
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}
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filled = 1;
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}
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count -= filled;
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done += filled;
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buf += filled;
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pos += filled;
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}
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*ppos += done;
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return done;
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}
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/*
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* MMIO BAR access
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* We handle two excluded ranges here as well, if the user tries to read
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* the ROM beyond what PCI tells us is available or the MSI-X table region,
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* we return 0xFF and writes are dropped.
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* Read or write from an __iomem region (MMIO or I/O port) with an excluded
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* range which is inaccessible. The excluded range drops writes and fills
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* reads with -1. This is intended for handling MSI-X vector tables and
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* leftover space for ROM BARs.
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*/
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ssize_t vfio_pci_mem_readwrite(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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static ssize_t do_io_rw(void __iomem *io, char __user *buf,
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loff_t off, size_t count, size_t x_start,
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size_t x_end, bool iswrite)
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{
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struct pci_dev *pdev = vdev->pdev;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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void __iomem *io;
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resource_size_t end;
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size_t done = 0;
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size_t x_start = 0, x_end = 0; /* excluded range */
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if (!pci_resource_start(pdev, bar))
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return -EINVAL;
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end = pci_resource_len(pdev, bar);
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if (pos > end)
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return -EINVAL;
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if (pos == end)
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return 0;
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if (pos + count > end)
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count = end - pos;
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if (bar == PCI_ROM_RESOURCE) {
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io = pci_map_rom(pdev, &x_start);
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x_end = end;
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} else {
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if (!vdev->barmap[bar]) {
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int ret;
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ret = pci_request_selected_regions(pdev, 1 << bar,
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"vfio");
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if (ret)
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return ret;
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vdev->barmap[bar] = pci_iomap(pdev, bar, 0);
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if (!vdev->barmap[bar]) {
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pci_release_selected_regions(pdev, 1 << bar);
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return -EINVAL;
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}
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}
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io = vdev->barmap[bar];
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if (bar == vdev->msix_bar) {
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x_start = vdev->msix_offset;
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x_end = vdev->msix_offset + vdev->msix_size;
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}
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}
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if (!io)
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return -EINVAL;
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ssize_t done = 0;
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while (count) {
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size_t fillable, filled;
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if (pos < x_start)
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fillable = x_start - pos;
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else if (pos >= x_end)
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fillable = end - pos;
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if (off < x_start)
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fillable = min(count, (size_t)(x_start - off));
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else if (off >= x_end)
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fillable = count;
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else
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fillable = 0;
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if (fillable >= 4 && !(pos % 4) && (count >= 4)) {
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if (fillable >= 4 && !(off % 4)) {
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__le32 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 4))
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goto out;
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return -EFAULT;
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iowrite32(le32_to_cpu(val), io + pos);
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iowrite32(le32_to_cpu(val), io + off);
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} else {
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val = cpu_to_le32(ioread32(io + pos));
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val = cpu_to_le32(ioread32(io + off));
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if (copy_to_user(buf, &val, 4))
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goto out;
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return -EFAULT;
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}
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filled = 4;
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} else if (fillable >= 2 && !(pos % 2) && (count >= 2)) {
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} else if (fillable >= 2 && !(off % 2)) {
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__le16 val;
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if (iswrite) {
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if (copy_from_user(&val, buf, 2))
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goto out;
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return -EFAULT;
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iowrite16(le16_to_cpu(val), io + pos);
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iowrite16(le16_to_cpu(val), io + off);
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} else {
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val = cpu_to_le16(ioread16(io + pos));
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val = cpu_to_le16(ioread16(io + off));
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if (copy_to_user(buf, &val, 2))
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goto out;
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return -EFAULT;
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}
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filled = 2;
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@ -227,43 +79,99 @@ ssize_t vfio_pci_mem_readwrite(struct vfio_pci_device *vdev, char __user *buf,
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if (iswrite) {
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if (copy_from_user(&val, buf, 1))
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goto out;
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return -EFAULT;
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iowrite8(val, io + pos);
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iowrite8(val, io + off);
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} else {
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val = ioread8(io + pos);
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val = ioread8(io + off);
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if (copy_to_user(buf, &val, 1))
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goto out;
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return -EFAULT;
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}
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filled = 1;
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} else {
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/* Drop writes, fill reads with FF */
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filled = min((size_t)(x_end - pos), count);
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/* Fill reads with -1, drop writes */
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filled = min(count, (size_t)(x_end - off));
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if (!iswrite) {
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char val = 0xFF;
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u8 val = 0xFF;
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size_t i;
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for (i = 0; i < filled; i++) {
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if (put_user(val, buf + i))
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goto out;
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}
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for (i = 0; i < filled; i++)
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if (copy_to_user(buf + i, &val, 1))
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return -EFAULT;
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}
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}
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count -= filled;
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done += filled;
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off += filled;
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buf += filled;
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pos += filled;
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}
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*ppos += done;
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return done;
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}
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ssize_t vfio_pci_bar_rw(struct vfio_pci_device *vdev, char __user *buf,
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size_t count, loff_t *ppos, bool iswrite)
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{
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struct pci_dev *pdev = vdev->pdev;
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loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
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int bar = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
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size_t x_start = 0, x_end = 0;
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resource_size_t end;
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void __iomem *io;
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ssize_t done;
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if (!pci_resource_start(pdev, bar))
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return -EINVAL;
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end = pci_resource_len(pdev, bar);
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if (pos >= end)
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return -EINVAL;
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count = min(count, (size_t)(end - pos));
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if (bar == PCI_ROM_RESOURCE) {
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/*
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* The ROM can fill less space than the BAR, so we start the
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* excluded range at the end of the actual ROM. This makes
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* filling large ROM BARs much faster.
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*/
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io = pci_map_rom(pdev, &x_start);
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if (!io)
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return -ENOMEM;
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x_end = end;
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} else if (!vdev->barmap[bar]) {
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int ret;
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ret = pci_request_selected_regions(pdev, 1 << bar, "vfio");
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if (ret)
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return ret;
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io = pci_iomap(pdev, bar, 0);
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if (!io) {
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pci_release_selected_regions(pdev, 1 << bar);
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return -ENOMEM;
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}
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vdev->barmap[bar] = io;
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} else
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io = vdev->barmap[bar];
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if (bar == vdev->msix_bar) {
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x_start = vdev->msix_offset;
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x_end = vdev->msix_offset + vdev->msix_size;
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}
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done = do_io_rw(io, buf, pos, count, x_start, x_end, iswrite);
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if (done >= 0)
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*ppos += done;
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out:
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if (bar == PCI_ROM_RESOURCE)
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pci_unmap_rom(pdev, io);
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return count ? -EFAULT : done;
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return done;
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}
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