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drm/amd/display: check for dp rev before reading lttpr regs

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[Why]
LTTPR was introduced after DP1.2. Reading LTTPR registers 0xFXXXX
on some DP 1.2 display is causing an unexpected behavior.

[How]
Make sure that we don't read any lttpr registers on 1.2 displays.

Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
abdoulaye berthe 2019-09-18 11:57:47 -04:00 committed by Alex Deucher
parent 8e5100a575
commit 903e859b72
1 changed files with 3 additions and 2 deletions
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5
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
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@ -2759,9 +2759,10 @@ static bool retrieve_link_cap(struct dc_link *link)
/* Set default timeout to 3.2ms and read LTTPR capabilities */ /* Set default timeout to 3.2ms and read LTTPR capabilities */
bool ext_timeout_support = link->dc->caps.extended_aux_timeout_support && bool ext_timeout_support = link->dc->caps.extended_aux_timeout_support &&
!link->dc->config.disable_extended_timeout_support; !link->dc->config.disable_extended_timeout_support;
link->is_lttpr_mode_transparent = true;
if (ext_timeout_support) { if (ext_timeout_support) {
status = dc_link_aux_configure_timeout(link->ddc, LINK_AUX_DEFAULT_EXTENDED_TIMEOUT_PERIOD); status = dc_link_aux_configure_timeout(link->ddc, LINK_AUX_DEFAULT_EXTENDED_TIMEOUT_PERIOD);
link->is_lttpr_mode_transparent = true;
} }
memset(dpcd_data, '\0', sizeof(dpcd_data)); memset(dpcd_data, '\0', sizeof(dpcd_data));
@ -2796,7 +2797,7 @@ static bool retrieve_link_cap(struct dc_link *link)
return false; return false;
} }
if (ext_timeout_support) { if (ext_timeout_support && link->dpcd_caps.dpcd_rev.raw >= 0x14) {
status = core_link_read_dpcd( status = core_link_read_dpcd(
link, link,
DP_PHY_REPEATER_CNT, DP_PHY_REPEATER_CNT,