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drm/radeon/kms: simplify storing current and requested PM mode

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We kept pointers to requested and current clock modes in every power state.
That was useless, more /global/ pointers in power struct are enough.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Rafał Miłecki 2010-02-20 23:15:04 +00:00 committed by Dave Airlie
parent d03f5d5971
commit 9038dfdf69
4 changed files with 25 additions and 37 deletions
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5
drivers/gpu/drm/radeon/radeon.h
View File

@ -652,9 +652,6 @@ struct radeon_power_state {
struct radeon_pm_clock_info clock_info[8]; struct radeon_pm_clock_info clock_info[8];
/* number of valid clock modes in this power state */ /* number of valid clock modes in this power state */
int num_clock_modes; int num_clock_modes;
/* currently selected clock mode */
struct radeon_pm_clock_info *current_clock_mode;
struct radeon_pm_clock_info *requested_clock_mode;
struct radeon_pm_clock_info *default_clock_mode; struct radeon_pm_clock_info *default_clock_mode;
/* non clock info about this state */ /* non clock info about this state */
struct radeon_pm_non_clock_info non_clock_info; struct radeon_pm_non_clock_info non_clock_info;
@ -691,7 +688,9 @@ struct radeon_pm {
/* number of valid power states */ /* number of valid power states */
int num_power_states; int num_power_states;
struct radeon_power_state *current_power_state; struct radeon_power_state *current_power_state;
struct radeon_pm_clock_info *current_clock_mode;
struct radeon_power_state *requested_power_state; struct radeon_power_state *requested_power_state;
struct radeon_pm_clock_info *requested_clock_mode;
struct radeon_power_state *default_power_state; struct radeon_power_state *default_power_state;
}; };

20
drivers/gpu/drm/radeon/radeon_atombios.c
View File

@ -1450,7 +1450,6 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);
rdev->pm.default_power_state = NULL; rdev->pm.default_power_state = NULL;
rdev->pm.current_power_state = NULL;
if (power_info) { if (power_info) {
if (frev < 4) { if (frev < 4) {
@ -1517,11 +1516,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
rdev->pm.power_state[state_index].type = rdev->pm.power_state[state_index].type =
POWER_STATE_TYPE_DEFAULT; POWER_STATE_TYPE_DEFAULT;
rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
rdev->pm.power_state[state_index].default_clock_mode = rdev->pm.power_state[state_index].default_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0]; &rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].current_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0];
} }
state_index++; state_index++;
break; break;
@ -1586,11 +1582,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
rdev->pm.power_state[state_index].type = rdev->pm.power_state[state_index].type =
POWER_STATE_TYPE_DEFAULT; POWER_STATE_TYPE_DEFAULT;
rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
rdev->pm.power_state[state_index].default_clock_mode = rdev->pm.power_state[state_index].default_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0]; &rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].current_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0];
} }
state_index++; state_index++;
break; break;
@ -1661,11 +1654,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
rdev->pm.power_state[state_index].type = rdev->pm.power_state[state_index].type =
POWER_STATE_TYPE_DEFAULT; POWER_STATE_TYPE_DEFAULT;
rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
rdev->pm.power_state[state_index].default_clock_mode = rdev->pm.power_state[state_index].default_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0]; &rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].current_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0];
} }
state_index++; state_index++;
break; break;
@ -1765,11 +1755,8 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
rdev->pm.power_state[state_index].type = rdev->pm.power_state[state_index].type =
POWER_STATE_TYPE_DEFAULT; POWER_STATE_TYPE_DEFAULT;
rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
rdev->pm.power_state[state_index].default_clock_mode = rdev->pm.power_state[state_index].default_clock_mode =
&rdev->pm.power_state[state_index].clock_info[mode_index - 1]; &rdev->pm.power_state[state_index].clock_info[mode_index - 1];
rdev->pm.power_state[state_index].current_clock_mode =
&rdev->pm.power_state[state_index].clock_info[mode_index - 1];
} }
state_index++; state_index++;
} }
@ -1788,18 +1775,19 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
rdev->pm.power_state[state_index].default_clock_mode = rdev->pm.power_state[state_index].default_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0]; &rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].current_clock_mode =
&rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
if (rdev->asic->get_pcie_lanes) if (rdev->asic->get_pcie_lanes)
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev); rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
else else
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16; rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
state_index++; state_index++;
} }
rdev->pm.num_power_states = state_index; rdev->pm.num_power_states = state_index;
rdev->pm.current_power_state = rdev->pm.default_power_state;
rdev->pm.current_clock_mode =
rdev->pm.default_power_state->default_clock_mode;
} }
void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable) void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable)

7
drivers/gpu/drm/radeon/radeon_combios.c
View File

@ -2358,7 +2358,6 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
int state_index = 0; int state_index = 0;
rdev->pm.default_power_state = NULL; rdev->pm.default_power_state = NULL;
rdev->pm.current_power_state = NULL;
if (rdev->flags & RADEON_IS_MOBILITY) { if (rdev->flags & RADEON_IS_MOBILITY) {
offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE); offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE);
@ -2447,15 +2446,17 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev)
rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;
rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0]; rdev->pm.power_state[state_index].default_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].current_clock_mode = &rdev->pm.power_state[state_index].clock_info[0];
rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE;
if (rdev->asic->get_pcie_lanes) if (rdev->asic->get_pcie_lanes)
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev); rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = radeon_get_pcie_lanes(rdev);
else else
rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16; rdev->pm.power_state[state_index].non_clock_info.pcie_lanes = 16;
rdev->pm.default_power_state = &rdev->pm.power_state[state_index]; rdev->pm.default_power_state = &rdev->pm.power_state[state_index];
rdev->pm.current_power_state = &rdev->pm.power_state[state_index];
rdev->pm.num_power_states = state_index + 1; rdev->pm.num_power_states = state_index + 1;
rdev->pm.current_power_state = rdev->pm.default_power_state;
rdev->pm.current_clock_mode =
rdev->pm.default_power_state->default_clock_mode;
} }
void radeon_external_tmds_setup(struct drm_encoder *encoder) void radeon_external_tmds_setup(struct drm_encoder *encoder)

30
drivers/gpu/drm/radeon/radeon_pm.c
View File

@ -143,50 +143,50 @@ static void radeon_get_power_state(struct radeon_device *rdev,
enum radeon_pm_action action) enum radeon_pm_action action)
{ {
switch (action) { switch (action) {
case PM_ACTION_NONE:
default:
rdev->pm.requested_power_state = rdev->pm.current_power_state;
rdev->pm.requested_power_state->requested_clock_mode =
rdev->pm.requested_power_state->current_clock_mode;
break;
case PM_ACTION_MINIMUM: case PM_ACTION_MINIMUM:
rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_BATTERY); rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_BATTERY);
rdev->pm.requested_power_state->requested_clock_mode = rdev->pm.requested_clock_mode =
radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_LOW); radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_LOW);
break; break;
case PM_ACTION_DOWNCLOCK: case PM_ACTION_DOWNCLOCK:
rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_POWERSAVE); rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_POWERSAVE);
rdev->pm.requested_power_state->requested_clock_mode = rdev->pm.requested_clock_mode =
radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_MID); radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_MID);
break; break;
case PM_ACTION_UPCLOCK: case PM_ACTION_UPCLOCK:
rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_DEFAULT); rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_DEFAULT);
rdev->pm.requested_power_state->requested_clock_mode = rdev->pm.requested_clock_mode =
radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH); radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH);
break; break;
case PM_ACTION_NONE:
default:
DRM_ERROR("Requested mode for not defined action\n");
return;
} }
DRM_INFO("Requested: e: %d m: %d p: %d\n", DRM_INFO("Requested: e: %d m: %d p: %d\n",
rdev->pm.requested_power_state->requested_clock_mode->sclk, rdev->pm.requested_clock_mode->sclk,
rdev->pm.requested_power_state->requested_clock_mode->mclk, rdev->pm.requested_clock_mode->mclk,
rdev->pm.requested_power_state->non_clock_info.pcie_lanes); rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
} }
static void radeon_set_power_state(struct radeon_device *rdev) static void radeon_set_power_state(struct radeon_device *rdev)
{ {
if (rdev->pm.requested_power_state == rdev->pm.current_power_state) /* if *_clock_mode are the same, *_power_state are as well */
if (rdev->pm.requested_clock_mode == rdev->pm.current_clock_mode)
return; return;
DRM_INFO("Setting: e: %d m: %d p: %d\n", DRM_INFO("Setting: e: %d m: %d p: %d\n",
rdev->pm.requested_power_state->requested_clock_mode->sclk, rdev->pm.requested_clock_mode->sclk,
rdev->pm.requested_power_state->requested_clock_mode->mclk, rdev->pm.requested_clock_mode->mclk,
rdev->pm.requested_power_state->non_clock_info.pcie_lanes); rdev->pm.requested_power_state->non_clock_info.pcie_lanes);
/* set pcie lanes */ /* set pcie lanes */
/* set voltage */ /* set voltage */
/* set engine clock */ /* set engine clock */
radeon_set_engine_clock(rdev, rdev->pm.requested_power_state->requested_clock_mode->sclk); radeon_set_engine_clock(rdev, rdev->pm.requested_clock_mode->sclk);
/* set memory clock */ /* set memory clock */
rdev->pm.current_power_state = rdev->pm.requested_power_state; rdev->pm.current_power_state = rdev->pm.requested_power_state;
rdev->pm.current_clock_mode = rdev->pm.requested_clock_mode;
} }
int radeon_pm_init(struct radeon_device *rdev) int radeon_pm_init(struct radeon_device *rdev)