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ARM: shmobile: Remove shmobile_boot_arg

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CPU boot configuration writes to shmobile_boot_arg, which is located in
the .text section, and thus should not be written to.

As of commit 1d33a354bb ("ARM: shmobile: Per-CPU SMP boot / sleep
code for SCU SoCs"), and ignoring accidental remainings,
shmobile_boot_arg is always set to MPIDR_HWID_BITMASK by C code.
Hence we can just hardcode this in the assembler code, and remove the
variable, and thus also remove the need to write to this variable.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2016-02-15 13:20:08 +01:00 committed by Simon Horman
parent 4e960f52fc
commit 901c5ffaae
4 changed files with 2 additions and 9 deletions
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1
arch/arm/mach-shmobile/common.h
View File

@ -4,7 +4,6 @@
extern void shmobile_init_delay(void); extern void shmobile_init_delay(void);
extern void shmobile_boot_vector(void); extern void shmobile_boot_vector(void);
extern unsigned long shmobile_boot_fn; extern unsigned long shmobile_boot_fn;
extern unsigned long shmobile_boot_arg;
extern unsigned long shmobile_boot_size; extern unsigned long shmobile_boot_size;
extern void shmobile_smp_boot(void); extern void shmobile_smp_boot(void);
extern void shmobile_smp_sleep(void); extern void shmobile_smp_sleep(void);

8
arch/arm/mach-shmobile/headsmp.S
View File

@ -24,7 +24,6 @@
.arm .arm
.align 12 .align 12
ENTRY(shmobile_boot_vector) ENTRY(shmobile_boot_vector)
ldr r0, 2f
ldr r1, 1f ldr r1, 1f
bx r1 bx r1
@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector)
.globl shmobile_boot_fn .globl shmobile_boot_fn
shmobile_boot_fn: shmobile_boot_fn:
1: .space 4 1: .space 4
.globl shmobile_boot_arg
shmobile_boot_arg:
2: .space 4
.globl shmobile_boot_size .globl shmobile_boot_size
shmobile_boot_size: shmobile_boot_size:
.long . - shmobile_boot_vector .long . - shmobile_boot_vector
@ -46,9 +42,9 @@ shmobile_boot_size:
*/ */
ENTRY(shmobile_smp_boot) ENTRY(shmobile_smp_boot)
@ r0 = MPIDR_HWID_BITMASK
mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
and r0, r1, r0 @ r0 = cpu_logical_map() value and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK
@ r0 = cpu_logical_map() value
mov r1, #0 @ r1 = CPU index mov r1, #0 @ r1 = CPU index
adr r2, 1f adr r2, 1f
ldmia r2, {r5, r6, r7} ldmia r2, {r5, r6, r7}

1
arch/arm/mach-shmobile/platsmp-apmu.c
View File

@ -123,7 +123,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
{ {
/* install boot code shared by all CPUs */ /* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* perform per-cpu setup */ /* perform per-cpu setup */
apmu_parse_cfg(apmu_init_cpu, apmu_config, num); apmu_parse_cfg(apmu_init_cpu, apmu_config, num);

1
arch/arm/mach-shmobile/platsmp-scu.c
View File

@ -44,7 +44,6 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
{ {
/* install boot code shared by all CPUs */ /* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* enable SCU and cache coherency on booting CPU */ /* enable SCU and cache coherency on booting CPU */
scu_enable(shmobile_scu_base); scu_enable(shmobile_scu_base);