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usb: dwc2: Change TxFIFO and RxFIFO flushing flow
Before flushing fifos required to check AHB master state and lush when AHB master is in IDLE state. Acked-by: John Youn <johnyoun@synopsys.com> Signed-off-by: Minas Harutyunyan <hminas@synopsys.com> Signed-off-by: Grigor Tovmasyan <tovmasya@synopsys.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -675,6 +675,11 @@ void dwc2_flush_tx_fifo(struct dwc2_hsotg *hsotg, const int num)
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dev_vdbg(hsotg->dev, "Flush Tx FIFO %d\n", num);
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/* Wait for AHB master IDLE state */
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if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000))
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dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n",
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__func__);
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greset = GRSTCTL_TXFFLSH;
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greset |= num << GRSTCTL_TXFNUM_SHIFT & GRSTCTL_TXFNUM_MASK;
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dwc2_writel(greset, hsotg->regs + GRSTCTL);
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@ -698,6 +703,11 @@ void dwc2_flush_rx_fifo(struct dwc2_hsotg *hsotg)
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dev_vdbg(hsotg->dev, "%s()\n", __func__);
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/* Wait for AHB master IDLE state */
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if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, GRSTCTL_AHBIDLE, 10000))
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dev_warn(hsotg->dev, "%s: HANG! AHB Idle GRSCTL\n",
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__func__);
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greset = GRSTCTL_RXFFLSH;
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dwc2_writel(greset, hsotg->regs + GRSTCTL);
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