mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 14:40:53 +07:00
crypto: caam - fix DECO RSR polling
RSR (Request Source Register) is not used when virtualization is disabled, thus don't poll for Valid bit. Besides this, if used, timeout has to be reinitialized. Signed-off-by: Horia Geanta <horia.geanta@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
parent
71d932d99d
commit
8f1da7b945
@ -89,12 +89,15 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
|
||||
/* Set the bit to request direct access to DECO0 */
|
||||
topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
|
||||
|
||||
if (ctrlpriv->virt_en == 1)
|
||||
if (ctrlpriv->virt_en == 1) {
|
||||
setbits32(&topregs->ctrl.deco_rsr, DECORSR_JR0);
|
||||
|
||||
while (!(rd_reg32(&topregs->ctrl.deco_rsr) & DECORSR_VALID) &&
|
||||
--timeout)
|
||||
cpu_relax();
|
||||
while (!(rd_reg32(&topregs->ctrl.deco_rsr) & DECORSR_VALID) &&
|
||||
--timeout)
|
||||
cpu_relax();
|
||||
|
||||
timeout = 100000;
|
||||
}
|
||||
|
||||
setbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user