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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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firewire: optimize config ROM creation
The config ROM image of the local node was created in CPU byte order,
then a temporary big endian copy was created to compute the CRC, and
finally the card driver created its own big endian copy.
We now generate it in big endian byte order in the first place to avoid
one byte order conversion and the temporary on-stack copy of the ROM
image (1000 bytes stack usage in process context). Furthermore, two
1000 bytes memset()s are replaced by one 1000 bytes - ROM length sized
memset.
The trivial fw_memcpy_{from,to}_be32() helpers are now superfluous and
removed. The newly added __compute_block_crc() function will be folded
into fw_compute_block_crc() in a subsequent change.
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
This commit is contained in:
Stefan Richter
parent
e21fcf798e
commit
8e85973efc
@ -38,6 +38,18 @@
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#include "core.h"
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static int __compute_block_crc(__be32 *block)
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{
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int length;
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u16 crc;
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length = (be32_to_cpu(block[0]) >> 16) & 0xff;
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crc = crc_itu_t(0, (u8 *)&block[1], length * 4);
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*block |= cpu_to_be32(crc);
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return length;
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}
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int fw_compute_block_crc(u32 *block)
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{
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__be32 be32_block[256];
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@ -72,11 +84,11 @@ static int descriptor_count;
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#define BIB_CMC ((1) << 30)
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#define BIB_IMC ((1) << 31)
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static u32 *generate_config_rom(struct fw_card *card, size_t *config_rom_length)
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static __be32 *generate_config_rom(struct fw_card *card, size_t *rom_length)
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{
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struct fw_descriptor *desc;
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static u32 config_rom[256];
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int i, j, length;
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static __be32 config_rom[256];
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int i, j, k, length;
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/*
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* Initialize contents of config rom buffer. On the OHCI
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@ -87,40 +99,39 @@ static u32 *generate_config_rom(struct fw_card *card, size_t *config_rom_length)
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* the version stored in the OHCI registers.
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*/
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memset(config_rom, 0, sizeof(config_rom));
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config_rom[0] = BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0);
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config_rom[1] = 0x31333934;
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config_rom[2] =
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config_rom[0] = cpu_to_be32(
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BIB_CRC_LENGTH(4) | BIB_INFO_LENGTH(4) | BIB_CRC(0));
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config_rom[1] = cpu_to_be32(0x31333934);
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config_rom[2] = cpu_to_be32(
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BIB_LINK_SPEED(card->link_speed) |
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BIB_GENERATION(card->config_rom_generation++ % 14 + 2) |
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BIB_MAX_ROM(2) |
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BIB_MAX_RECEIVE(card->max_receive) |
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BIB_BMC | BIB_ISC | BIB_CMC | BIB_IMC;
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config_rom[3] = card->guid >> 32;
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config_rom[4] = card->guid;
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BIB_BMC | BIB_ISC | BIB_CMC | BIB_IMC);
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config_rom[3] = cpu_to_be32(card->guid >> 32);
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config_rom[4] = cpu_to_be32(card->guid);
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/* Generate root directory. */
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i = 5;
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config_rom[i++] = 0;
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config_rom[i++] = 0x0c0083c0; /* node capabilities */
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j = i + descriptor_count;
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config_rom[6] = cpu_to_be32(0x0c0083c0); /* node capabilities */
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i = 7;
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j = 7 + descriptor_count;
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/* Generate root directory entries for descriptors. */
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list_for_each_entry (desc, &descriptor_list, link) {
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if (desc->immediate > 0)
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config_rom[i++] = desc->immediate;
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config_rom[i] = desc->key | (j - i);
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config_rom[i++] = cpu_to_be32(desc->immediate);
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config_rom[i] = cpu_to_be32(desc->key | (j - i));
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i++;
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j += desc->length;
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}
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/* Update root directory length. */
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config_rom[5] = (i - 5 - 1) << 16;
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config_rom[5] = cpu_to_be32((i - 5 - 1) << 16);
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/* End of root directory, now copy in descriptors. */
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list_for_each_entry (desc, &descriptor_list, link) {
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memcpy(&config_rom[i], desc->data, desc->length * 4);
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for (k = 0; k < desc->length; k++)
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config_rom[i + k] = cpu_to_be32(desc->data[k]);
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i += desc->length;
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}
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@ -129,9 +140,9 @@ static u32 *generate_config_rom(struct fw_card *card, size_t *config_rom_length)
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* the bus info block, which is always the case for this
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* implementation. */
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for (i = 0; i < j; i += length + 1)
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length = fw_compute_block_crc(config_rom + i);
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length = __compute_block_crc(config_rom + i);
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*config_rom_length = j;
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*rom_length = j;
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return config_rom;
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}
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@ -139,7 +150,7 @@ static u32 *generate_config_rom(struct fw_card *card, size_t *config_rom_length)
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static void update_config_roms(void)
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{
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struct fw_card *card;
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u32 *config_rom;
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__be32 *config_rom;
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size_t length;
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list_for_each_entry (card, &card_list, link) {
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@ -432,7 +443,7 @@ EXPORT_SYMBOL(fw_card_initialize);
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int fw_card_add(struct fw_card *card,
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u32 max_receive, u32 link_speed, u64 guid)
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{
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u32 *config_rom;
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__be32 *config_rom;
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size_t length;
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int ret;
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@ -462,7 +473,8 @@ EXPORT_SYMBOL(fw_card_add);
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* shutdown still need to be provided by the card driver.
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*/
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static int dummy_enable(struct fw_card *card, u32 *config_rom, size_t length)
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static int dummy_enable(struct fw_card *card,
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const __be32 *config_rom, size_t length)
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{
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BUG();
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return -1;
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@ -475,7 +487,7 @@ static int dummy_update_phy_reg(struct fw_card *card, int address,
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}
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static int dummy_set_config_rom(struct fw_card *card,
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u32 *config_rom, size_t length)
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const __be32 *config_rom, size_t length)
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{
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/*
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* We take the card out of card_list before setting the dummy
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@ -40,7 +40,8 @@ struct fw_card_driver {
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* enable the PHY or set the link_on bit and initiate a bus
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* reset.
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*/
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int (*enable)(struct fw_card *card, u32 *config_rom, size_t length);
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int (*enable)(struct fw_card *card,
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const __be32 *config_rom, size_t length);
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int (*update_phy_reg)(struct fw_card *card, int address,
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int clear_bits, int set_bits);
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@ -48,10 +49,10 @@ struct fw_card_driver {
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/*
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* Update the config rom for an enabled card. This function
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* should change the config rom that is presented on the bus
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* an initiate a bus reset.
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* and initiate a bus reset.
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*/
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int (*set_config_rom)(struct fw_card *card,
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u32 *config_rom, size_t length);
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const __be32 *config_rom, size_t length);
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void (*send_request)(struct fw_card *card, struct fw_packet *packet);
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void (*send_response)(struct fw_card *card, struct fw_packet *packet);
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@ -205,7 +205,7 @@ struct fw_ohci {
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dma_addr_t config_rom_bus;
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__be32 *next_config_rom;
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dma_addr_t next_config_rom_bus;
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u32 next_header;
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__be32 next_header;
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struct ar_context ar_request_ctx;
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struct ar_context ar_response_ctx;
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@ -1355,8 +1355,9 @@ static void bus_reset_tasklet(unsigned long data)
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*/
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reg_write(ohci, OHCI1394_BusOptions,
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be32_to_cpu(ohci->config_rom[2]));
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ohci->config_rom[0] = cpu_to_be32(ohci->next_header);
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reg_write(ohci, OHCI1394_ConfigROMhdr, ohci->next_header);
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ohci->config_rom[0] = ohci->next_header;
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reg_write(ohci, OHCI1394_ConfigROMhdr,
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be32_to_cpu(ohci->next_header));
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}
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#ifdef CONFIG_FIREWIRE_OHCI_REMOTE_DMA
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@ -1464,7 +1465,17 @@ static int software_reset(struct fw_ohci *ohci)
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return -EBUSY;
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}
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static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
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static void copy_config_rom(__be32 *dest, const __be32 *src, size_t length)
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{
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size_t size = length * 4;
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memcpy(dest, src, size);
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if (size < CONFIG_ROM_SIZE)
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memset(&dest[length], 0, CONFIG_ROM_SIZE - size);
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}
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static int ohci_enable(struct fw_card *card,
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const __be32 *config_rom, size_t length)
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{
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struct fw_ohci *ohci = fw_ohci(card);
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struct pci_dev *dev = to_pci_dev(card->device);
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@ -1565,8 +1576,7 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
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if (ohci->next_config_rom == NULL)
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return -ENOMEM;
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memset(ohci->next_config_rom, 0, CONFIG_ROM_SIZE);
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fw_memcpy_to_be32(ohci->next_config_rom, config_rom, length * 4);
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copy_config_rom(ohci->next_config_rom, config_rom, length);
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} else {
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/*
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* In the suspend case, config_rom is NULL, which
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@ -1576,7 +1586,7 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
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ohci->next_config_rom_bus = ohci->config_rom_bus;
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}
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ohci->next_header = be32_to_cpu(ohci->next_config_rom[0]);
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ohci->next_header = ohci->next_config_rom[0];
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ohci->next_config_rom[0] = 0;
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reg_write(ohci, OHCI1394_ConfigROMhdr, 0);
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reg_write(ohci, OHCI1394_BusOptions,
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@ -1610,7 +1620,7 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
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}
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static int ohci_set_config_rom(struct fw_card *card,
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u32 *config_rom, size_t length)
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const __be32 *config_rom, size_t length)
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{
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struct fw_ohci *ohci;
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unsigned long flags;
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@ -1659,9 +1669,7 @@ static int ohci_set_config_rom(struct fw_card *card,
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ohci->next_config_rom = next_config_rom;
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ohci->next_config_rom_bus = next_config_rom_bus;
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memset(ohci->next_config_rom, 0, CONFIG_ROM_SIZE);
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fw_memcpy_to_be32(ohci->next_config_rom, config_rom,
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length * 4);
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copy_config_rom(ohci->next_config_rom, config_rom, length);
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ohci->next_header = config_rom[0];
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ohci->next_config_rom[0] = 0;
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@ -20,20 +20,6 @@
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#define fw_notify(s, args...) printk(KERN_NOTICE KBUILD_MODNAME ": " s, ## args)
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#define fw_error(s, args...) printk(KERN_ERR KBUILD_MODNAME ": " s, ## args)
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static inline void fw_memcpy_from_be32(void *_dst, void *_src, size_t size)
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{
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u32 *dst = _dst;
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__be32 *src = _src;
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int i;
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for (i = 0; i < size / 4; i++)
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dst[i] = be32_to_cpu(src[i]);
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}
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static inline void fw_memcpy_to_be32(void *_dst, void *_src, size_t size)
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{
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fw_memcpy_from_be32(_dst, _src, size);
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}
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#define CSR_REGISTER_BASE 0xfffff0000000ULL
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/* register offsets are relative to CSR_REGISTER_BASE */
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