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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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PCI: xilinx: Save MSI controller in pci_sys_data
Save MSI controller in pci_sys_data instead of assigning MSI controller pointer to every PCI bus in .add_bus(). [bhelgaas: use xilinx_pcie_msi_chip, not xilinx_pcie_msi_controller] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -432,20 +432,6 @@ static void xilinx_pcie_enable_msi(struct xilinx_pcie_port *port)
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pcie_write(port, msg_addr, XILINX_PCIE_REG_MSIBASE2);
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}
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/**
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* xilinx_pcie_add_bus - Add MSI chip info to PCIe bus
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* @bus: PCIe bus
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*/
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static void xilinx_pcie_add_bus(struct pci_bus *bus)
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{
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if (IS_ENABLED(CONFIG_PCI_MSI)) {
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struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);
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xilinx_pcie_msi_chip.dev = port->dev;
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bus->msi = &xilinx_pcie_msi_chip;
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}
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}
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/* INTx Functions */
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/**
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@ -925,10 +911,14 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
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.private_data = (void **)&port,
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.setup = xilinx_pcie_setup,
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.map_irq = of_irq_parse_and_map_pci,
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.add_bus = xilinx_pcie_add_bus,
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.scan = xilinx_pcie_scan_bus,
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.ops = &xilinx_pcie_ops,
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};
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#ifdef CONFIG_PCI_MSI
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xilinx_pcie_msi_chip.dev = port->dev;
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hw.msi_ctrl = &xilinx_pcie_msi_chip;
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#endif
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pci_common_init_dev(dev, &hw);
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return 0;
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