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x86/microcode: Update the new microcode revision unconditionally
Handle the case where microcode gets loaded on the BSP's hyperthread sibling first and the boot_cpu_data's microcode revision doesn't get updated because of early exit due to the siblings sharing a microcode engine. For that, simply write the updated revision on all CPUs unconditionally. Signed-off-by: Filippo Sironi <sironi@amazon.de> Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: prarit@redhat.com Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1533050970-14385-1-git-send-email-sironi@amazon.de
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@ -504,6 +504,7 @@ static enum ucode_state apply_microcode_amd(int cpu)
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struct microcode_amd *mc_amd;
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struct ucode_cpu_info *uci;
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struct ucode_patch *p;
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enum ucode_state ret;
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u32 rev, dummy;
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BUG_ON(raw_smp_processor_id() != cpu);
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@ -521,9 +522,8 @@ static enum ucode_state apply_microcode_amd(int cpu)
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/* need to apply patch? */
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if (rev >= mc_amd->hdr.patch_id) {
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c->microcode = rev;
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uci->cpu_sig.rev = rev;
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return UCODE_OK;
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ret = UCODE_OK;
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goto out;
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}
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if (__apply_microcode_amd(mc_amd)) {
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@ -531,17 +531,21 @@ static enum ucode_state apply_microcode_amd(int cpu)
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cpu, mc_amd->hdr.patch_id);
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return UCODE_ERROR;
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}
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pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
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mc_amd->hdr.patch_id);
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uci->cpu_sig.rev = mc_amd->hdr.patch_id;
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c->microcode = mc_amd->hdr.patch_id;
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rev = mc_amd->hdr.patch_id;
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ret = UCODE_UPDATED;
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pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
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out:
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uci->cpu_sig.rev = rev;
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c->microcode = rev;
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/* Update boot_cpu_data's revision too, if we're on the BSP: */
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if (c->cpu_index == boot_cpu_data.cpu_index)
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boot_cpu_data.microcode = mc_amd->hdr.patch_id;
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boot_cpu_data.microcode = rev;
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return UCODE_UPDATED;
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return ret;
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}
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static int install_equiv_cpu_table(const u8 *buf)
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@ -795,6 +795,7 @@ static enum ucode_state apply_microcode_intel(int cpu)
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struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
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struct cpuinfo_x86 *c = &cpu_data(cpu);
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struct microcode_intel *mc;
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enum ucode_state ret;
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static int prev_rev;
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u32 rev;
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@ -817,9 +818,8 @@ static enum ucode_state apply_microcode_intel(int cpu)
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*/
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rev = intel_get_microcode_revision();
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if (rev >= mc->hdr.rev) {
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uci->cpu_sig.rev = rev;
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c->microcode = rev;
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return UCODE_OK;
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ret = UCODE_OK;
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goto out;
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}
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/*
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@ -848,14 +848,17 @@ static enum ucode_state apply_microcode_intel(int cpu)
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prev_rev = rev;
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}
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ret = UCODE_UPDATED;
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out:
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uci->cpu_sig.rev = rev;
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c->microcode = rev;
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c->microcode = rev;
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/* Update boot_cpu_data's revision too, if we're on the BSP: */
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if (c->cpu_index == boot_cpu_data.cpu_index)
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boot_cpu_data.microcode = rev;
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return UCODE_UPDATED;
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return ret;
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}
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static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
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