mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 08:50:54 +07:00
Merge branch 'imx/dt-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
From Shawn Guo <shawn.guo@linaro.org>: Here is the second (last) batch of imx device tree changes for 3.6. * 'imx/dt-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: imx6q: ensure ANATOP controller is available ARM: dts: imx6q-sabrelite: add ecspi1 pinctrl support ARM: dts: imx6q-sabrelite: add usb devices ARM: imx6q: disable usb charger detector ARM: imx6q: add usbphy clocks ARM: imx6q: add usb controller clock lookups ARM: dts: imx: update #interrupt-cells for gpio nodes bindings: update imx and mxs #gpio-cells Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
8d5776d5fe
@ -8,8 +8,16 @@ Required properties:
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by low 16 pins and the second one is for high 16 pins.
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify optional parameters (currently
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unused).
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells : Should be 2. The first cell is the GPIO number.
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The second cell bits[3:0] is used to specify trigger type and level flags:
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1 = low-to-high edge triggered.
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2 = high-to-low edge triggered.
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4 = active high level-sensitive.
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8 = active low level-sensitive.
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Example:
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@ -19,4 +27,6 @@ gpio0: gpio@73f84000 {
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interrupts = <50 51>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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@ -13,8 +13,9 @@ Required properties for GPIO node:
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- interrupts : Should be the port interrupt shared by all 32 pins.
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- gpio-controller : Marks the device node as a gpio controller.
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify optional parameters (currently
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unused).
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the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells : Should be 2. The first cell is the GPIO number.
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The second cell bits[3:0] is used to specify trigger type and level flags:
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@ -121,7 +121,7 @@ gpio1: gpio@10015000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@10015100 {
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@ -131,7 +131,7 @@ gpio2: gpio@10015100 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@10015200 {
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@ -141,7 +141,7 @@ gpio3: gpio@10015200 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@10015300 {
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@ -151,7 +151,7 @@ gpio4: gpio@10015300 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio5: gpio@10015400 {
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@ -161,7 +161,7 @@ gpio5: gpio@10015400 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio6: gpio@10015500 {
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@ -171,7 +171,7 @@ gpio6: gpio@10015500 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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cspi3: cspi@10017000 {
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@ -133,7 +133,7 @@ gpio1: gpio@73f84000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@73f88000 {
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@ -143,7 +143,7 @@ gpio2: gpio@73f88000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@73f8c000 {
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@ -153,7 +153,7 @@ gpio3: gpio@73f8c000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@73f90000 {
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@ -163,7 +163,7 @@ gpio4: gpio@73f90000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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wdog@73f98000 { /* WDOG1 */
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@ -135,7 +135,7 @@ gpio1: gpio@53f84000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@53f88000 {
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@ -145,7 +145,7 @@ gpio2: gpio@53f88000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@53f8c000 {
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@ -155,7 +155,7 @@ gpio3: gpio@53f8c000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@53f90000 {
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@ -165,7 +165,7 @@ gpio4: gpio@53f90000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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wdog@53f98000 { /* WDOG1 */
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@ -203,7 +203,7 @@ gpio5: gpio@53fdc000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio6: gpio@53fe0000 {
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@ -213,7 +213,7 @@ gpio6: gpio@53fe0000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio7: gpio@53fe4000 {
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@ -223,7 +223,7 @@ gpio7: gpio@53fe4000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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i2c@53fec000 { /* I2C3 */
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@ -27,6 +27,8 @@ spba-bus@02000000 {
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ecspi@02008000 { /* eCSPI1 */
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fsl,spi-num-chipselects = <1>;
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cs-gpios = <&gpio3 19 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1_1>;
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status = "okay";
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flash: m25p80@0 {
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@ -42,9 +44,31 @@ ssi1: ssi@02028000 {
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};
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};
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iomuxc@020e0000 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_hog>;
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gpios {
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pinctrl_gpio_hog: gpiohog {
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fsl,pins = <
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144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
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121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
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>;
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};
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};
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};
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};
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aips-bus@02100000 { /* AIPS2 */
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usb@02184000 { /* USB OTG */
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vbus-supply = <®_usb_otg_vbus>;
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status = "okay";
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};
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usb@02184200 { /* USB1 */
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status = "okay";
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};
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ethernet@02188000 {
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phy-mode = "rgmii";
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phy-reset-gpios = <&gpio3 23 0>;
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@ -111,6 +135,15 @@ reg_3p3v: 3p3v {
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_usb_otg_vbus: usb_otg_vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb_otg_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 0>;
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enable-active-high;
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};
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};
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sound {
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@ -283,7 +283,7 @@ gpio1: gpio@0209c000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@020a0000 {
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@ -293,7 +293,7 @@ gpio2: gpio@020a0000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio3: gpio@020a4000 {
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@ -303,7 +303,7 @@ gpio3: gpio@020a4000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio4: gpio@020a8000 {
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@ -313,7 +313,7 @@ gpio4: gpio@020a8000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio5: gpio@020ac000 {
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@ -323,7 +323,7 @@ gpio5: gpio@020ac000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio6: gpio@020b0000 {
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@ -333,7 +333,7 @@ gpio6: gpio@020b0000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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gpio7: gpio@020b4000 {
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@ -343,7 +343,7 @@ gpio7: gpio@020b4000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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#interrupt-cells = <2>;
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};
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kpp@020b8000 {
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@ -461,12 +461,14 @@ regulator-vddsoc@140 {
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};
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};
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usbphy@020c9000 { /* USBPHY1 */
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usbphy1: usbphy@020c9000 {
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compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
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reg = <0x020c9000 0x1000>;
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interrupts = <0 44 0x04>;
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};
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usbphy@020ca000 { /* USBPHY2 */
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usbphy2: usbphy@020ca000 {
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compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
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reg = <0x020ca000 0x1000>;
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interrupts = <0 45 0x04>;
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};
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@ -579,6 +581,14 @@ pinctrl_usdhc4_1: usdhc4grp-1 {
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1517 0x17059>; /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */
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};
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};
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ecspi1 {
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pinctrl_ecspi1_1: ecspi1grp-1 {
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fsl,pins = <101 0x100b1 /* MX6Q_PAD_EIM_D17__ECSPI1_MISO */
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109 0x100b1 /* MX6Q_PAD_EIM_D18__ECSPI1_MOSI */
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94 0x100b1>; /* MX6Q_PAD_EIM_D16__ECSPI1_SCLK */
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};
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};
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};
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dcic@020e4000 { /* DCIC1 */
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@ -614,6 +624,36 @@ aipstz@0217c000 { /* AIPSTZ2 */
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reg = <0x0217c000 0x4000>;
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};
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usb@02184000 { /* USB OTG */
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compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
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reg = <0x02184000 0x200>;
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interrupts = <0 43 0x04>;
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fsl,usbphy = <&usbphy1>;
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status = "disabled";
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};
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usb@02184200 { /* USB1 */
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compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
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reg = <0x02184200 0x200>;
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interrupts = <0 40 0x04>;
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fsl,usbphy = <&usbphy2>;
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status = "disabled";
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};
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usb@02184400 { /* USB2 */
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compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
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reg = <0x02184400 0x200>;
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interrupts = <0 41 0x04>;
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status = "disabled";
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};
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usb@02184600 { /* USB3 */
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compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
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reg = <0x02184600 0x200>;
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interrupts = <0 42 0x04>;
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status = "disabled";
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};
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ethernet@02188000 {
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compatible = "fsl,imx6q-fec";
|
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reg = <0x02188000 0x4000>;
|
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@ -842,6 +842,7 @@ config SOC_IMX6Q
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select HAVE_IMX_MMDC
|
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select HAVE_IMX_SRC
|
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select HAVE_SMP
|
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select MFD_ANATOP
|
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select PINCTRL
|
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select PINCTRL_IMX6Q
|
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select USE_OF
|
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|
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@ -152,7 +152,7 @@ enum mx6q_clks {
|
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ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
|
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usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
|
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pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
|
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ssi2_ipg, ssi3_ipg, rom,
|
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ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
|
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clk_max
|
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};
|
||||
|
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@ -198,6 +198,9 @@ int __init mx6q_clocks_init(void)
|
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clk[pll7_usb_host] = imx_clk_pllv3(IMX_PLLV3_USB, "pll7_usb_host","osc", base + 0x20, 0x2000, 0x3);
|
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clk[pll8_enet] = imx_clk_pllv3(IMX_PLLV3_ENET, "pll8_enet", "osc", base + 0xe0, 0x182000, 0x3);
|
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|
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clk[usbphy1] = imx_clk_gate("usbphy1", "pll3_usb_otg", base + 0x10, 6);
|
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clk[usbphy2] = imx_clk_gate("usbphy2", "pll7_usb_host", base + 0x20, 6);
|
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|
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/* name parent_name reg idx */
|
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clk[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0);
|
||||
clk[pll2_pfd1_594m] = imx_clk_pfd("pll2_pfd1_594m", "pll2_bus", base + 0x100, 1);
|
||||
@ -401,6 +404,12 @@ int __init mx6q_clocks_init(void)
|
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clk_register_clkdev(clk[gpmi_bch], "gpmi_bch", "112000.gpmi-nand");
|
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clk_register_clkdev(clk[gpmi_apb], "gpmi_apb", "112000.gpmi-nand");
|
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clk_register_clkdev(clk[gpmi_io], "gpmi_io", "112000.gpmi-nand");
|
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clk_register_clkdev(clk[usboh3], NULL, "2184000.usb");
|
||||
clk_register_clkdev(clk[usboh3], NULL, "2184200.usb");
|
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clk_register_clkdev(clk[usboh3], NULL, "2184400.usb");
|
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clk_register_clkdev(clk[usboh3], NULL, "2184600.usb");
|
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clk_register_clkdev(clk[usbphy1], NULL, "20c9000.usbphy");
|
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clk_register_clkdev(clk[usbphy2], NULL, "20ca000.usbphy");
|
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clk_register_clkdev(clk[uart_serial], "per", "2020000.serial");
|
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clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial");
|
||||
clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial");
|
||||
|
||||
@ -24,6 +24,7 @@
|
||||
#include <linux/pinctrl/machine.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/micrel_phy.h>
|
||||
#include <linux/mfd/anatop.h>
|
||||
#include <asm/smp_twd.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
#include <asm/hardware/gic.h>
|
||||
@ -113,6 +114,45 @@ static void __init imx6q_sabrelite_init(void)
|
||||
imx6q_sabrelite_cko1_setup();
|
||||
}
|
||||
|
||||
static void __init imx6q_usb_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct platform_device *pdev = NULL;
|
||||
struct anatop *adata = NULL;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
|
||||
if (np)
|
||||
pdev = of_find_device_by_node(np);
|
||||
if (pdev)
|
||||
adata = platform_get_drvdata(pdev);
|
||||
if (!adata) {
|
||||
if (np)
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
|
||||
#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
|
||||
|
||||
#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
|
||||
#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
|
||||
|
||||
/*
|
||||
* The external charger detector needs to be disabled,
|
||||
* or the signal at DP will be poor
|
||||
*/
|
||||
anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
|
||||
BM_ANADIG_USB_CHRG_DETECT_EN_B
|
||||
| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
|
||||
~0);
|
||||
anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
|
||||
BM_ANADIG_USB_CHRG_DETECT_EN_B |
|
||||
BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
|
||||
~0);
|
||||
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
static void __init imx6q_init_machine(void)
|
||||
{
|
||||
/*
|
||||
@ -127,6 +167,7 @@ static void __init imx6q_init_machine(void)
|
||||
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
|
||||
|
||||
imx6q_pm_init();
|
||||
imx6q_usb_init();
|
||||
}
|
||||
|
||||
static void __init imx6q_map_io(void)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user