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ASoC: rsnd: ssiu: Support BUSIF other than BUSIF0
Currently only BUSIF0 is supported by SSIU, all register setting is done only for BUSIF. Since BUSIF1 ~ BUSIF7 has been supported, so also support these BUSIF from SSIU. One note is that we can't support SSI9-4/5/6/7 so far, because its address is out of calculation rule. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> Signed-off-by: Timo Wischer <twischer@de.adit-jv.com> [Kuninori: tidyup for upstream] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -219,9 +219,30 @@ static int rsnd_gen2_probe(struct rsnd_priv *priv)
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RSND_GEN_S_REG(HDMI1_SEL, 0x9e4),
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RSND_GEN_S_REG(HDMI1_SEL, 0x9e4),
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/* FIXME: it needs SSI_MODE2/3 in the future */
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/* FIXME: it needs SSI_MODE2/3 in the future */
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RSND_GEN_M_REG(SSI_BUSIF_MODE, 0x0, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF0_MODE, 0x0, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF_ADINR, 0x4, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF0_ADINR, 0x4, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF_DALIGN,0x8, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF0_DALIGN, 0x8, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF1_MODE, 0x20, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF1_ADINR, 0x24, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF1_DALIGN, 0x28, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF2_MODE, 0x40, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF2_ADINR, 0x44, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF2_DALIGN, 0x48, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF3_MODE, 0x60, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF3_ADINR, 0x64, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF3_DALIGN, 0x68, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF4_MODE, 0x500, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF4_ADINR, 0x504, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF4_DALIGN, 0x508, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF5_MODE, 0x520, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF5_ADINR, 0x524, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF5_DALIGN, 0x528, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF6_MODE, 0x540, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF6_ADINR, 0x544, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF6_DALIGN, 0x548, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF7_MODE, 0x560, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF7_ADINR, 0x564, 0x80),
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RSND_GEN_M_REG(SSI_BUSIF7_DALIGN, 0x568, 0x80),
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RSND_GEN_M_REG(SSI_MODE, 0xc, 0x80),
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RSND_GEN_M_REG(SSI_MODE, 0xc, 0x80),
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RSND_GEN_M_REG(SSI_CTRL, 0x10, 0x80),
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RSND_GEN_M_REG(SSI_CTRL, 0x10, 0x80),
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RSND_GEN_M_REG(SSI_INT_ENABLE, 0x18, 0x80),
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RSND_GEN_M_REG(SSI_INT_ENABLE, 0x18, 0x80),
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@ -156,9 +156,30 @@ enum rsnd_reg {
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RSND_REG_SSI_MODE2,
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RSND_REG_SSI_MODE2,
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RSND_REG_SSI_CONTROL,
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RSND_REG_SSI_CONTROL,
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RSND_REG_SSI_CTRL,
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RSND_REG_SSI_CTRL,
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RSND_REG_SSI_BUSIF_MODE,
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RSND_REG_SSI_BUSIF0_MODE,
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RSND_REG_SSI_BUSIF_ADINR,
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RSND_REG_SSI_BUSIF0_ADINR,
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RSND_REG_SSI_BUSIF_DALIGN,
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RSND_REG_SSI_BUSIF0_DALIGN,
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RSND_REG_SSI_BUSIF1_MODE,
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RSND_REG_SSI_BUSIF1_ADINR,
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RSND_REG_SSI_BUSIF1_DALIGN,
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RSND_REG_SSI_BUSIF2_MODE,
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RSND_REG_SSI_BUSIF2_ADINR,
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RSND_REG_SSI_BUSIF2_DALIGN,
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RSND_REG_SSI_BUSIF3_MODE,
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RSND_REG_SSI_BUSIF3_ADINR,
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RSND_REG_SSI_BUSIF3_DALIGN,
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RSND_REG_SSI_BUSIF4_MODE,
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RSND_REG_SSI_BUSIF4_ADINR,
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RSND_REG_SSI_BUSIF4_DALIGN,
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RSND_REG_SSI_BUSIF5_MODE,
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RSND_REG_SSI_BUSIF5_ADINR,
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RSND_REG_SSI_BUSIF5_DALIGN,
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RSND_REG_SSI_BUSIF6_MODE,
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RSND_REG_SSI_BUSIF6_ADINR,
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RSND_REG_SSI_BUSIF6_DALIGN,
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RSND_REG_SSI_BUSIF7_MODE,
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RSND_REG_SSI_BUSIF7_ADINR,
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RSND_REG_SSI_BUSIF7_DALIGN,
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RSND_REG_SSI_INT_ENABLE,
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RSND_REG_SSI_INT_ENABLE,
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RSND_REG_SSI_SYS_STATUS0,
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RSND_REG_SSI_SYS_STATUS0,
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RSND_REG_SSI_SYS_STATUS1,
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RSND_REG_SSI_SYS_STATUS1,
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@ -140,15 +140,59 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod,
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rsnd_mod_write(mod, SSI_MODE, mode);
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rsnd_mod_write(mod, SSI_MODE, mode);
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if (rsnd_ssi_use_busif(io)) {
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if (rsnd_ssi_use_busif(io)) {
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rsnd_mod_write(mod, SSI_BUSIF_ADINR,
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int id = rsnd_mod_id(mod);
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rsnd_get_adinr_bit(mod, io) |
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int busif = rsnd_ssi_get_busif(io);
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(rsnd_io_is_play(io) ?
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rsnd_runtime_channel_after_ctu(io) :
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/*
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rsnd_runtime_channel_original(io)));
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* FIXME
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rsnd_mod_write(mod, SSI_BUSIF_MODE,
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*
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rsnd_get_busif_shift(io, mod) | 1);
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* We can't support SSI9-4/5/6/7, because its address is
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rsnd_mod_write(mod, SSI_BUSIF_DALIGN,
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* out of calculation rule
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rsnd_get_dalign(mod, io));
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*/
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if ((id == 9) && (busif >= 4)) {
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struct device *dev = rsnd_priv_to_dev(priv);
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dev_err(dev, "This driver doesn't support SSI%d-%d, so far",
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id, busif);
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}
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#define RSND_WRITE_BUSIF(i) \
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rsnd_mod_write(mod, SSI_BUSIF##i##_ADINR, \
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rsnd_get_adinr_bit(mod, io) | \
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(rsnd_io_is_play(io) ? \
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rsnd_runtime_channel_after_ctu(io) : \
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rsnd_runtime_channel_original(io))); \
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rsnd_mod_write(mod, SSI_BUSIF##i##_MODE, \
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rsnd_get_busif_shift(io, mod) | 1); \
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rsnd_mod_write(mod, SSI_BUSIF##i##_DALIGN, \
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rsnd_get_dalign(mod, io))
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switch (busif) {
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case 0:
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RSND_WRITE_BUSIF(0);
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break;
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case 1:
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RSND_WRITE_BUSIF(1);
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break;
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case 2:
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RSND_WRITE_BUSIF(2);
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break;
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case 3:
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RSND_WRITE_BUSIF(3);
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break;
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case 4:
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RSND_WRITE_BUSIF(4);
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break;
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case 5:
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RSND_WRITE_BUSIF(5);
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break;
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case 6:
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RSND_WRITE_BUSIF(6);
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break;
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case 7:
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RSND_WRITE_BUSIF(7);
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break;
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}
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}
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}
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if (hdmi) {
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if (hdmi) {
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@ -194,10 +238,12 @@ static int rsnd_ssiu_start_gen2(struct rsnd_mod *mod,
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struct rsnd_dai_stream *io,
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struct rsnd_dai_stream *io,
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struct rsnd_priv *priv)
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struct rsnd_priv *priv)
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{
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{
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int busif = rsnd_ssi_get_busif(io);
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if (!rsnd_ssi_use_busif(io))
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if (!rsnd_ssi_use_busif(io))
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return 0;
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return 0;
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rsnd_mod_write(mod, SSI_CTRL, 0x1);
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rsnd_mod_bset(mod, SSI_CTRL, 1 << (busif * 4), 1 << (busif * 4));
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if (rsnd_ssi_multi_slaves_runtime(io))
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if (rsnd_ssi_multi_slaves_runtime(io))
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rsnd_mod_write(mod, SSI_CONTROL, 0x1);
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rsnd_mod_write(mod, SSI_CONTROL, 0x1);
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@ -209,10 +255,12 @@ static int rsnd_ssiu_stop_gen2(struct rsnd_mod *mod,
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struct rsnd_dai_stream *io,
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struct rsnd_dai_stream *io,
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struct rsnd_priv *priv)
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struct rsnd_priv *priv)
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{
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{
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int busif = rsnd_ssi_get_busif(io);
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if (!rsnd_ssi_use_busif(io))
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if (!rsnd_ssi_use_busif(io))
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return 0;
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return 0;
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rsnd_mod_write(mod, SSI_CTRL, 0);
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rsnd_mod_bset(mod, SSI_CTRL, 1 << (busif * 4), 0);
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if (rsnd_ssi_multi_slaves_runtime(io))
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if (rsnd_ssi_multi_slaves_runtime(io))
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rsnd_mod_write(mod, SSI_CONTROL, 0);
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rsnd_mod_write(mod, SSI_CONTROL, 0);
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