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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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spi: mpc512x-psc: add support for Freescale MPC5125
The register layout of the PSC devices differ between MPC5121 and
MPC5125, but the registers are named nearly identical and their purpose
is similar enough ("freescale identical") such that substituting
mpc52xx_psc by mpc5125_psc is nearly enough to make the driver work on
MPC5125. To keep supporting MPC5121 this patch introduces a cpp
macro to select the right struct that defines the register layout.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Uwe Kleine-König
Mark Brown
parent
bc0195aad0
commit
8bf960985d
@ -150,7 +150,10 @@
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/* Structure of the hardware registers */
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struct mpc52xx_psc {
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u8 mode; /* PSC + 0x00 */
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union {
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u8 mode; /* PSC + 0x00 */
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u8 mr2;
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};
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u8 reserved0[3];
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union { /* PSC + 0x04 */
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u16 status;
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@ -30,11 +30,37 @@
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#include <linux/gpio.h>
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#include <asm/mpc52xx_psc.h>
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enum {
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TYPE_MPC5121,
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TYPE_MPC5125,
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};
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/*
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* This macro abstracts the differences in the PSC register layout between
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* MPC5121 (which uses a struct mpc52xx_psc) and MPC5125 (using mpc5125_psc).
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*/
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#define psc_addr(mps, regname) ({ \
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void *__ret; \
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switch(mps->type) { \
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case TYPE_MPC5121: { \
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struct mpc52xx_psc __iomem *psc = mps->psc; \
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__ret = &psc->regname; \
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}; \
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break; \
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case TYPE_MPC5125: { \
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struct mpc5125_psc __iomem *psc = mps->psc; \
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__ret = &psc->regname; \
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}; \
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break; \
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} \
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__ret; })
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struct mpc512x_psc_spi {
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void (*cs_control)(struct spi_device *spi, bool on);
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/* driver internal data */
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struct mpc52xx_psc __iomem *psc;
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int type;
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void __iomem *psc;
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struct mpc512x_psc_fifo __iomem *fifo;
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unsigned int irq;
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u8 bits_per_word;
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@ -71,13 +97,12 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
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{
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struct mpc512x_psc_spi_cs *cs = spi->controller_state;
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struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
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struct mpc52xx_psc __iomem *psc = mps->psc;
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u32 sicr;
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u32 ccr;
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int speed;
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u16 bclkdiv;
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sicr = in_be32(&psc->sicr);
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sicr = in_be32(psc_addr(mps, sicr));
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/* Set clock phase and polarity */
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if (spi->mode & SPI_CPHA)
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@ -94,9 +119,9 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
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sicr |= 0x10000000;
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else
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sicr &= ~0x10000000;
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out_be32(&psc->sicr, sicr);
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out_be32(psc_addr(mps, sicr), sicr);
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ccr = in_be32(&psc->ccr);
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ccr = in_be32(psc_addr(mps, ccr));
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ccr &= 0xFF000000;
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speed = cs->speed_hz;
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if (!speed)
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@ -104,7 +129,7 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
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bclkdiv = (mps->mclk_rate / speed) - 1;
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ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
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out_be32(&psc->ccr, ccr);
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out_be32(psc_addr(mps, ccr), ccr);
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mps->bits_per_word = cs->bits_per_word;
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if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
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@ -315,16 +340,15 @@ static int mpc512x_psc_spi_msg_xfer(struct spi_master *master,
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static int mpc512x_psc_spi_prep_xfer_hw(struct spi_master *master)
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{
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struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
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struct mpc52xx_psc __iomem *psc = mps->psc;
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dev_dbg(&master->dev, "%s()\n", __func__);
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/* Zero MR2 */
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in_8(&psc->mode);
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out_8(&psc->mode, 0x0);
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in_8(psc_addr(mps, mr2));
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out_8(psc_addr(mps, mr2), 0x0);
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/* enable transmitter/receiver */
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out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
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out_8(psc_addr(mps, command), MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
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return 0;
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}
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@ -332,13 +356,12 @@ static int mpc512x_psc_spi_prep_xfer_hw(struct spi_master *master)
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static int mpc512x_psc_spi_unprep_xfer_hw(struct spi_master *master)
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{
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struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
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struct mpc52xx_psc __iomem *psc = mps->psc;
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struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
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dev_dbg(&master->dev, "%s()\n", __func__);
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/* disable transmitter/receiver and fifo interrupt */
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out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
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out_8(psc_addr(mps, command), MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
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out_be32(&fifo->tximr, 0);
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return 0;
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@ -388,7 +411,6 @@ static void mpc512x_psc_spi_cleanup(struct spi_device *spi)
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static int mpc512x_psc_spi_port_config(struct spi_master *master,
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struct mpc512x_psc_spi *mps)
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{
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struct mpc52xx_psc __iomem *psc = mps->psc;
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struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
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u32 sicr;
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u32 ccr;
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@ -396,12 +418,12 @@ static int mpc512x_psc_spi_port_config(struct spi_master *master,
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u16 bclkdiv;
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/* Reset the PSC into a known state */
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out_8(&psc->command, MPC52xx_PSC_RST_RX);
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out_8(&psc->command, MPC52xx_PSC_RST_TX);
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out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
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out_8(psc_addr(mps, command), MPC52xx_PSC_RST_RX);
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out_8(psc_addr(mps, command), MPC52xx_PSC_RST_TX);
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out_8(psc_addr(mps, command), MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
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/* Disable psc interrupts all useful interrupts are in fifo */
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out_be16(&psc->isr_imr.imr, 0);
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out_be16(psc_addr(mps, isr_imr.imr), 0);
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/* Disable fifo interrupts, will be enabled later */
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out_be32(&fifo->tximr, 0);
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@ -417,18 +439,18 @@ static int mpc512x_psc_spi_port_config(struct spi_master *master,
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0x00004000 | /* MSTR = 1 -- SPI master */
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0x00000800; /* UseEOF = 1 -- SS low until EOF */
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out_be32(&psc->sicr, sicr);
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out_be32(psc_addr(mps, sicr), sicr);
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ccr = in_be32(&psc->ccr);
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ccr = in_be32(psc_addr(mps, ccr));
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ccr &= 0xFF000000;
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speed = 1000000; /* default 1MHz */
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bclkdiv = (mps->mclk_rate / speed) - 1;
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ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
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out_be32(&psc->ccr, ccr);
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out_be32(psc_addr(mps, ccr), ccr);
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/* Set 2ms DTL delay */
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out_8(&psc->ctur, 0x00);
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out_8(&psc->ctlr, 0x82);
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out_8(psc_addr(mps, ctur), 0x00);
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out_8(psc_addr(mps, ctlr), 0x82);
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/* we don't use the alarms */
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out_be32(&fifo->rxalarm, 0xfff);
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@ -482,6 +504,7 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
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dev_set_drvdata(dev, master);
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mps = spi_master_get_devdata(master);
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mps->type = (int)of_device_get_match_data(dev);
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mps->irq = irq;
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if (pdata == NULL) {
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@ -589,7 +612,8 @@ static int mpc512x_psc_spi_of_remove(struct platform_device *op)
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}
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static const struct of_device_id mpc512x_psc_spi_of_match[] = {
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{ .compatible = "fsl,mpc5121-psc-spi", },
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{ .compatible = "fsl,mpc5121-psc-spi", .data = (void *)TYPE_MPC5121 },
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{ .compatible = "fsl,mpc5125-psc-spi", .data = (void *)TYPE_MPC5125 },
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{},
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};
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