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ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards

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The downstream ChromeOS 3.8 kernel sets the clock frequency
for the I2C bus 7 at 400kHz. Do the same change in mainline.

Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Javier Martinez Canillas 2014-09-14 00:47:22 +09:00 committed by Kukjin Kim
parent dc0cf1a3ec
commit 8be6a6d04c
2 changed files with 2 additions and 0 deletions
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1
arch/arm/boot/dts/exynos5420-peach-pit.dts
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@ -489,6 +489,7 @@ ldo35_reg: LDO35 {
&hsi2c_7 {
status = "okay";
clock-frequency = <400000>;
max98090: codec@10 {
compatible = "maxim,max98090";

1
arch/arm/boot/dts/exynos5800-peach-pi.dts
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@ -487,6 +487,7 @@ ldo35_reg: LDO35 {
&hsi2c_7 {
status = "okay";
clock-frequency = <400000>;
max98091: codec@10 {
compatible = "maxim,max98091";