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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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media: platform: fix several typos
Use codespell to fix lots of typos over frontends. Manually verified to avoid false-positives. Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Andrzej Pietrasiewicz <andrzejtp2010@gmail.com> Reviewed-by: Benoit Parrot <bparrot@ti.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Houlong Wei <houlong.wei@mediatek.com> Reviewed-by: Yong Deng <yong.deng@magewell.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
This commit is contained in:
Mauro Carvalho Chehab
parent
167905540e
commit
8b72c18d46
@ -668,7 +668,7 @@ menuconfig SDR_PLATFORM_DRIVERS
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if SDR_PLATFORM_DRIVERS
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config VIDEO_RCAR_DRIF
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tristate "Renesas Digitial Radio Interface (DRIF)"
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tristate "Renesas Digital Radio Interface (DRIF)"
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depends on VIDEO_V4L2
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depends on ARCH_RENESAS || COMPILE_TEST
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select VIDEOBUF2_VMALLOC
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@ -110,7 +110,7 @@ struct atmel_isi {
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bool enable_preview_path;
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struct completion complete;
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/* ISI peripherial clock */
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/* ISI peripheral clock */
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struct clk *pclk;
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unsigned int irq;
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@ -1078,7 +1078,7 @@ static void isi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
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dev_dbg(isi->dev, "Removing %s\n", video_device_node_name(isi->vdev));
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/* Checks internaly if vdev have been init or not */
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/* Checks internally if vdev have been init or not */
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video_unregister_device(isi->vdev);
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}
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@ -103,7 +103,7 @@ static const unsigned char chroma_ac_value[162 + 2] = {
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/*
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* Quantization tables for luminance and chrominance components in
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* zig-zag scan order from the Freescale i.MX VPU libaries
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* zig-zag scan order from the Freescale i.MX VPU libraries
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*/
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static unsigned char luma_q[64] = {
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@ -328,7 +328,7 @@ static void isif_config_bclamp(struct isif_black_clamp *bc)
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if (bc->en) {
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val = bc->bc_mode_color << ISIF_BC_MODE_COLOR_SHIFT;
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/* Enable BC and horizontal clamp caculation paramaters */
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/* Enable BC and horizontal clamp calculation parameters */
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val = val | 1 | (bc->horz.mode << ISIF_HORZ_BC_MODE_SHIFT);
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regw(val, CLAMPCFG);
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@ -358,7 +358,7 @@ static void isif_config_bclamp(struct isif_black_clamp *bc)
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regw(bc->horz.win_start_v_calc, CLHWIN2);
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}
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/* vertical clamp caculation paramaters */
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/* vertical clamp calculation parameters */
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/* Reset clamp value sel for previous line */
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val |=
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@ -242,7 +242,7 @@ static int vpbe_set_output(struct vpbe_device *vpbe_dev, int index)
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goto unlock;
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/*
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* It is assumed that venc or extenal encoder will set a default
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* It is assumed that venc or external encoder will set a default
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* mode in the sub device. For external encoder or LCD pannel output,
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* we also need to set up the lcd port for the required mode. So setup
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* the lcd port for the default mode that is configured in the board
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@ -1,7 +1,7 @@
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/*
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* vpif - Video Port Interface driver
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* VPIF is a receiver and transmitter for video data. It has two channels(0, 1)
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* that receiveing video byte stream and two channels(2, 3) for video output.
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* that receiving video byte stream and two channels(2, 3) for video output.
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* The hardware supports SDTV, HDTV formats, raw data capture.
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* Currently, the driver supports NTSC and PAL standards.
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*
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@ -138,7 +138,7 @@ static int vpif_buffer_queue_setup(struct vb2_queue *vq,
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* vpif_buffer_queue : Callback function to add buffer to DMA queue
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* @vb: ptr to vb2_buffer
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*
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* This callback fucntion queues the buffer to DMA engine
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* This callback function queues the buffer to DMA engine
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*/
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static void vpif_buffer_queue(struct vb2_buffer *vb)
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{
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@ -635,7 +635,7 @@ static int vpif_try_fmt_vid_out(struct file *file, void *priv,
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struct v4l2_pix_format *pixfmt = &fmt->fmt.pix;
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/*
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* to supress v4l-compliance warnings silently correct
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* to suppress v4l-compliance warnings silently correct
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* the pixelformat
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*/
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if (pixfmt->pixelformat != V4L2_PIX_FMT_YUV422P)
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@ -18,7 +18,7 @@
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#define FIMC_IS_COMMAND_VER 110 /* FIMC-IS command set version 1.10 */
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/* Enumeration of commands beetween the FIMC-IS and the host processor. */
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/* Enumeration of commands between the FIMC-IS and the host processor. */
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/* HOST to FIMC-IS */
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#define HIC_PREVIEW_STILL 0x0001
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@ -298,7 +298,7 @@ enum isp_af_mode {
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#define ISP_FLASH_COMMAND_AUTO 2
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#define ISP_FLASH_COMMAND_TORCH 3 /* 3 sec */
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/* Flash red-eye commads */
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/* Flash red-eye commands */
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#define ISP_FLASH_REDEYE_DISABLE 0
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#define ISP_FLASH_REDEYE_ENABLE 1
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@ -79,7 +79,7 @@ struct fimc_camclk_info {
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/**
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* struct fimc_sensor_info - image data source subdev information
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* @pdata: sensor's atrributes passed as media device's platform data
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* @pdata: sensor's attributes passed as media device's platform data
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* @asd: asynchronous subdev registration data structure
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* @subdev: image sensor v4l2 subdev
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* @host: fimc device the sensor is currently linked to
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@ -183,7 +183,7 @@ struct csis_drvdata {
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* @index: the hardware instance index
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* @pdev: CSIS platform device
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* @phy: pointer to the CSIS generic PHY
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* @regs: mmaped I/O registers memory
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* @regs: mmapped I/O registers memory
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* @supplies: CSIS regulator supplies
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* @clock: CSIS clocks
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* @irq: requested s5p-mipi-csis irq number
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@ -745,7 +745,7 @@ static int s5pcsis_parse_dt(struct platform_device *pdev,
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goto err;
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}
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/* Get MIPI CSI-2 bus configration from the endpoint node. */
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/* Get MIPI CSI-2 bus configuration from the endpoint node. */
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of_property_read_u32(node, "samsung,csis-hs-settle",
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&state->hs_settle);
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state->wclk_ext = of_property_read_bool(node,
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@ -240,8 +240,8 @@ static void mmpcam_calc_dphy(struct mcam_camera *mcam)
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* bit 8 ~ bit 15: HS_SETTLE
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* Time interval during which the HS
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* receiver shall ignore any Data Lane
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* HS transistions.
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* The vaule has been calibrated on
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* HS transitions.
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* The value has been calibrated on
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* different boards. It seems to work well.
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*
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* More detail please refer
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@ -41,7 +41,7 @@
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#define MTK_MDP_CTX_ERROR BIT(5)
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/**
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* struct mtk_mdp_pix_align - alignement of image
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* struct mtk_mdp_pix_align - alignment of image
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* @org_w: source alignment of width
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* @org_h: source alignment of height
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* @target_w: dst alignment of width
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@ -122,8 +122,8 @@ struct mtk_mdp_frame {
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/**
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* struct mtk_mdp_variant - image processor variant information
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* @pix_max: maximum limit of image size
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* @pix_min: minimun limit of image size
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* @pix_align: alignement of image
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* @pix_min: minimum limit of image size
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* @pix_align: alignment of image
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* @h_scale_up_max: maximum scale-up in horizontal
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* @v_scale_up_max: maximum scale-up in vertical
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* @h_scale_down_max: maximum scale-down in horizontal
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@ -1165,7 +1165,7 @@ static void vb2ops_vdec_buf_queue(struct vb2_buffer *vb)
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ret = vdec_if_decode(ctx, &src_mem, NULL, &res_chg);
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if (ret || !res_chg) {
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/*
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* fb == NULL menas to parse SPS/PPS header or
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* fb == NULL means to parse SPS/PPS header or
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* resolution info in src_mem. Decode can fail
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* if there is no SPS header or picture info
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* in bs
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@ -151,9 +151,9 @@ struct mtk_q_data {
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* @intra_period: I frame period
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* @gop_size: group of picture size, it's used as the intra frame period
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* @framerate_num: frame rate numerator. ex: framerate_num=30 and
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* framerate_denom=1 menas FPS is 30
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* framerate_denom=1 means FPS is 30
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* @framerate_denom: frame rate denominator. ex: framerate_num=30 and
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* framerate_denom=1 menas FPS is 30
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* framerate_denom=1 means FPS is 30
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* @h264_max_qp: Max value for H.264 quantization parameter
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* @h264_profile: V4L2 defined H.264 profile
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* @h264_level: V4L2 defined H.264 level
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@ -393,7 +393,7 @@ static void mtk_venc_set_param(struct mtk_vcodec_ctx *ctx,
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param->input_yuv_fmt = VENC_YUV_FORMAT_NV21;
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break;
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default:
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mtk_v4l2_err("Unsupport fourcc =%d", q_data_src->fmt->fourcc);
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mtk_v4l2_err("Unsupported fourcc =%d", q_data_src->fmt->fourcc);
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break;
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}
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param->h264_profile = enc_params->h264_profile;
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@ -55,7 +55,7 @@ struct h264_fb {
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/**
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* struct h264_ring_fb_list - ring frame buffer list
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* @fb_list : frame buffer arrary
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* @fb_list : frame buffer array
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* @read_idx : read index
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* @write_idx : write index
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* @count : buffer count in list
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@ -72,7 +72,7 @@ struct h264_ring_fb_list {
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/**
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* struct vdec_h264_dec_info - decode information
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* @dpb_sz : decoding picture buffer size
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* @resolution_changed : resoltion change happen
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* @resolution_changed : resolution change happen
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* @realloc_mv_buf : flag to notify driver to re-allocate mv buffer
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* @reserved : for 8 bytes alignment
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* @bs_dma : Input bit-stream buffer dma address
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@ -120,7 +120,7 @@ struct vdec_vp8_hw_reg_base {
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/**
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* struct vdec_vp8_vpu_inst - VPU instance for VP8 decode
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* @wq_hd : Wait queue to wait VPU message ack
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* @signaled : 1 - Host has received ack message from VPU, 0 - not recevie
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* @signaled : 1 - Host has received ack message from VPU, 0 - not receive
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* @failure : VPU execution result status 0 - success, others - fail
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* @inst_addr : VPU decoder instance address
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*/
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@ -80,7 +80,7 @@ void vdec_if_deinit(struct mtk_vcodec_ctx *ctx);
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* vdec_if_decode() - trigger decode
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* @ctx : [in] v4l2 context
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* @bs : [in] input bitstream
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* @fb : [in] frame buffer to store decoded frame, when null menas parse
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* @fb : [in] frame buffer to store decoded frame, when null means parse
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* header only
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* @res_chg : [out] resolution change happens if current bs have different
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* picture width/height
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@ -62,7 +62,7 @@ int vpu_dec_start(struct vdec_vpu_inst *vpu, uint32_t *data, unsigned int len);
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/**
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* vpu_dec_end - end decoding, basically the function will be invoked once
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* when HW decoding done interrupt received successfully. The
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* decoder in VPU will continute to do referene frame management
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* decoder in VPU will continue to do reference frame management
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* and check if there is a new decoded frame available to display.
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*
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* @vpu : instance for vdec_vpu_inst
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@ -1129,7 +1129,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh,
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}
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timing = &dssdev->panel.timings;
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/* We dont support RGB24-packed mode if vrfb rotation
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/* We don't support RGB24-packed mode if vrfb rotation
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* is enabled*/
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if ((is_rotation_enabled(vout)) &&
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f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) {
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@ -1147,7 +1147,7 @@ static int vidioc_s_fmt_vid_out(struct file *file, void *fh,
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vout->fbuf.fmt.width = timing->x_res;
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}
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/* change to samller size is OK */
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/* change to smaller size is OK */
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bpp = omap_vout_try_format(&f->fmt.pix);
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f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height * bpp;
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@ -37,7 +37,7 @@
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#define VID_MAX_WIDTH 1280 /* Largest width */
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#define VID_MAX_HEIGHT 720 /* Largest height */
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/* Mimimum requirement is 2x2 for DSS */
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/* Minimum requirement is 2x2 for DSS */
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#define VID_MIN_WIDTH 2
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#define VID_MIN_HEIGHT 2
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@ -135,7 +135,7 @@ struct omap_vout_device {
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enum omap_color_mode dss_mode;
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/* we don't allow to request new buffer when old buffers are
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* still mmaped
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* still mmapped
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*/
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int mmap_count;
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@ -1517,7 +1517,7 @@ void omap3isp_print_status(struct isp_device *isp)
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*
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* To solve this problem power management support is split into prepare/complete
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* and suspend/resume operations. The pipelines are stopped in prepare() and the
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* ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
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* ISP clocks get disabled in suspend(). Similarly, the clocks are re-enabled in
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* resume(), and the the pipelines are restarted in complete().
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*
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* TODO: PM dependencies between the ISP and sensors are not modelled explicitly
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@ -1594,7 +1594,7 @@ static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
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return 0;
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/* We're in continuous mode, and memory writes were disabled due to a
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* buffer underrun. Reenable them now that we have a buffer. The buffer
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* buffer underrun. Re-enable them now that we have a buffer. The buffer
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* address has been set in ccdc_video_queue.
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*/
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if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
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@ -1712,7 +1712,7 @@ static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
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* data to memory the CCDC and LSC are stopped immediately but
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* without change the CCDC stopping state machine. The CCDC
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* stopping state machine should be used only when user request
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* for stopping is received (SINGLESHOT is an exeption).
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* for stopping is received (SINGLESHOT is an exception).
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*/
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switch (ccdc->state) {
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case ISP_PIPELINE_STREAM_SINGLESHOT:
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@ -710,7 +710,7 @@ static void csi2_isr_ctx(struct isp_csi2_device *csi2,
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/* Skip interrupts until we reach the frame skip count. The CSI2 will be
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* automatically disabled, as the frame skip count has been programmed
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* in the CSI2_CTx_CTRL1::COUNT field, so reenable it.
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* in the CSI2_CTx_CTRL1::COUNT field, so re-enable it.
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*
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* It would have been nice to rely on the FRAME_NUMBER interrupt instead
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* but it turned out that the interrupt is only generated when the CSI2
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@ -1631,7 +1631,7 @@ static int pxa_camera_set_bus_param(struct pxa_camera_dev *pcdev)
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pcdev->channels = 1;
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/* Make choises, based on platform preferences */
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/* Make choices, based on platform preferences */
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if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
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(common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
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if (pcdev->platform_flags & PXA_CAMERA_HSP)
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@ -219,7 +219,7 @@ struct venus_buffer {
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#define to_venus_buffer(ptr) container_of(ptr, struct venus_buffer, vb)
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/**
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* struct venus_inst - holds per instance paramerters
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* struct venus_inst - holds per instance parameters
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*
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* @list: used for attach an instance to the core
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* @lock: instance lock
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@ -681,7 +681,7 @@ static int rvin_setup(struct rvin_dev *vin)
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break;
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}
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/* Enable VSYNC Field Toogle mode after one VSYNC input */
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/* Enable VSYNC Field Toggle mode after one VSYNC input */
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if (vin->info->model == RCAR_GEN3)
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dmr2 = VNDMR2_FTEV;
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else
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@ -665,7 +665,7 @@ static void rvin_mc_try_format(struct rvin_dev *vin,
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* The V4L2 specification clearly documents the colorspace fields
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* as being set by drivers for capture devices. Using the values
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* supplied by userspace thus wouldn't comply with the API. Until
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* the API is updated force fixed vaules.
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* the API is updated force fixed values.
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*/
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pix->colorspace = RVIN_DEFAULT_COLORSPACE;
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pix->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(pix->colorspace);
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@ -964,7 +964,7 @@ void rvin_v4l2_unregister(struct rvin_dev *vin)
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v4l2_info(&vin->v4l2_dev, "Removing %s\n",
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video_device_node_name(&vin->vdev));
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/* Checks internaly if vdev have been init or not */
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/* Checks internally if vdev have been init or not */
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video_unregister_device(&vin->vdev);
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}
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@ -256,7 +256,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx)
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}
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/*
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* Cacluate the up/down scaling mode/factor.
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* Calculate the up/down scaling mode/factor.
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*
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* RGA used to scale the picture first, and then rotate second,
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* so we need to swap the w/h when rotate degree is 90/270.
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@ -304,7 +304,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx)
|
||||
}
|
||||
|
||||
/*
|
||||
* Cacluate the framebuffer virtual strides and active size,
|
||||
* Calculate the framebuffer virtual strides and active size,
|
||||
* note that the step of vir_stride / vir_width is 4 byte words
|
||||
*/
|
||||
src_vir_info.data.vir_stride = ctx->in.stride >> 2;
|
||||
@ -318,7 +318,7 @@ static void rga_cmd_set_trans_info(struct rga_ctx *ctx)
|
||||
dst_act_info.data.act_width = dst_w - 1;
|
||||
|
||||
/*
|
||||
* Cacluate the source framebuffer base address with offset pixel.
|
||||
* Calculate the source framebuffer base address with offset pixel.
|
||||
*/
|
||||
src_offsets = rga_get_addr_offset(&ctx->in, src_x, src_y,
|
||||
src_w, src_h);
|
||||
|
||||
@ -260,7 +260,7 @@ struct camif_vp {
|
||||
* @clock: clocks required for the CAMIF operation
|
||||
* @lock: mutex protecting this data structure
|
||||
* @slock: spinlock protecting CAMIF registers
|
||||
* @io_base: start address of the mmaped CAMIF registers
|
||||
* @io_base: start address of the mmapped CAMIF registers
|
||||
*/
|
||||
struct camif_dev {
|
||||
struct media_device media_dev;
|
||||
|
||||
@ -153,7 +153,7 @@ struct s5p_jpeg_variant {
|
||||
|
||||
/**
|
||||
* struct jpeg_fmt - driver's internal color format data
|
||||
* @name: format descritpion
|
||||
* @name: format description
|
||||
* @fourcc: the fourcc code, 0 if not applicable
|
||||
* @depth: number of bits per pixel
|
||||
* @colplanes: number of color planes (1 for packed formats)
|
||||
@ -193,7 +193,7 @@ struct s5p_jpeg_marker {
|
||||
* @sos: SOS marker's position relative to the buffer beginning
|
||||
* @dht: DHT markers' positions relative to the buffer beginning
|
||||
* @dqt: DQT markers' positions relative to the buffer beginning
|
||||
* @sof: SOF0 marker's postition relative to the buffer beginning
|
||||
* @sof: SOF0 marker's position relative to the buffer beginning
|
||||
* @sof_len: SOF0 marker's payload length (without length field itself)
|
||||
* @components: number of image components
|
||||
* @size: image buffer size in bytes
|
||||
|
||||
@ -268,7 +268,7 @@ struct s5p_mfc_priv_buf {
|
||||
* @enc_ctrl_handler: control framework handler for encoding
|
||||
* @pm: power management control
|
||||
* @variant: MFC hardware variant information
|
||||
* @num_inst: couter of active MFC instances
|
||||
* @num_inst: counter of active MFC instances
|
||||
* @irqlock: lock for operations on videobuf2 queues
|
||||
* @condlock: lock for changing/checking if a context is ready to be
|
||||
* processed
|
||||
|
||||
@ -51,7 +51,7 @@ int s5p_mfc_load_firmware(struct s5p_mfc_dev *dev)
|
||||
struct firmware *fw_blob;
|
||||
int i, err = -EINVAL;
|
||||
|
||||
/* Firmare has to be present as a separate file or compiled
|
||||
/* Firmware has to be present as a separate file or compiled
|
||||
* into kernel. */
|
||||
mfc_debug_enter();
|
||||
|
||||
|
||||
@ -602,7 +602,7 @@ static int vidioc_querybuf(struct file *file, void *priv,
|
||||
int i;
|
||||
|
||||
if (buf->memory != V4L2_MEMORY_MMAP) {
|
||||
mfc_err("Only mmaped buffers can be used\n");
|
||||
mfc_err("Only mmapped buffers can be used\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
mfc_debug(2, "State: %d, buf->type: %d\n", ctx->state, buf->type);
|
||||
|
||||
@ -1293,7 +1293,7 @@ static int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx)
|
||||
* First set the output frame buffers
|
||||
*/
|
||||
if (ctx->capture_state != QUEUE_BUFS_MMAPED) {
|
||||
mfc_err("It seems that not all destination buffers were mmaped\nMFC requires that all destination are mmaped before starting processing\n");
|
||||
mfc_err("It seems that not all destination buffers were mmapped\nMFC requires that all destination are mmapped before starting processing\n");
|
||||
return -EAGAIN;
|
||||
}
|
||||
if (list_empty(&ctx->src_queue)) {
|
||||
|
||||
@ -53,7 +53,7 @@ static int s5p_mfc_alloc_dec_temp_buffers_v6(struct s5p_mfc_ctx *ctx)
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Release temproary buffers for decoding */
|
||||
/* Release temporary buffers for decoding */
|
||||
static void s5p_mfc_release_dec_desc_buffer_v6(struct s5p_mfc_ctx *ctx)
|
||||
{
|
||||
/* NOP */
|
||||
@ -1928,7 +1928,7 @@ static inline int s5p_mfc_run_init_dec_buffers(struct s5p_mfc_ctx *ctx)
|
||||
|
||||
if (ctx->capture_state != QUEUE_BUFS_MMAPED) {
|
||||
mfc_err("It seems that not all destination buffers were\n"
|
||||
"mmaped.MFC requires that all destination are mmaped\n"
|
||||
"mmapped.MFC requires that all destination are mmapped\n"
|
||||
"before starting processing.\n");
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
@ -193,7 +193,7 @@ struct c8sectpfei {
|
||||
#define C8SECTPFE_SYS_ENABLE BIT(0)
|
||||
|
||||
/*
|
||||
* Ponter record data structure required for each input block
|
||||
* Pointer record data structure required for each input block
|
||||
* see Table 82 on page 167 of functional specification.
|
||||
*/
|
||||
|
||||
|
||||
@ -286,7 +286,7 @@ struct delta_dec {
|
||||
* Header parsing must be done using decode(), giving
|
||||
* explicitly header access unit or first access unit of bitstream.
|
||||
* If no valid header is found, get_streaminfo will return -ENODATA,
|
||||
* in this case the next bistream access unit must be decoded till
|
||||
* in this case the next bitstream access unit must be decoded till
|
||||
* get_streaminfo becomes successful.
|
||||
*/
|
||||
int (*get_streaminfo)(struct delta_ctx *ctx,
|
||||
|
||||
@ -626,7 +626,7 @@ static int hva_h264_prepare_task(struct hva_ctx *pctx,
|
||||
td->frame_width = frame_width;
|
||||
td->frame_height = frame_height;
|
||||
|
||||
/* set frame alignement */
|
||||
/* set frame alignment */
|
||||
td->window_width = frame_width;
|
||||
td->window_height = frame_height;
|
||||
td->window_horizontal_offset = 0;
|
||||
|
||||
@ -1544,7 +1544,7 @@ static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
|
||||
|
||||
dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
|
||||
|
||||
/* Checks internaly if vdev has been init or not */
|
||||
/* Checks internally if vdev has been init or not */
|
||||
video_unregister_device(dcmi->vdev);
|
||||
}
|
||||
|
||||
|
||||
@ -65,7 +65,7 @@ bool sun6i_csi_is_format_supported(struct sun6i_csi *csi, u32 pixformat,
|
||||
int sun6i_csi_set_power(struct sun6i_csi *csi, bool enable);
|
||||
|
||||
/**
|
||||
* sun6i_csi_update_config() - update the csi register setttings
|
||||
* sun6i_csi_update_config() - update the csi register settings
|
||||
* @csi: pointer to the csi
|
||||
* @config: see struct sun6i_csi_config
|
||||
*/
|
||||
|
||||
@ -404,7 +404,7 @@ EXPORT_SYMBOL(vpdma_map_desc_buf);
|
||||
|
||||
/*
|
||||
* unmap descriptor/payload DMA buffer, disabling DMA access and
|
||||
* allowing the main processor to acces the data
|
||||
* allowing the main processor to access the data
|
||||
*/
|
||||
void vpdma_unmap_desc_buf(struct vpdma_data *vpdma, struct vpdma_buf *buf)
|
||||
{
|
||||
@ -501,7 +501,7 @@ void vpdma_reset_desc_list(struct vpdma_desc_list *list)
|
||||
EXPORT_SYMBOL(vpdma_reset_desc_list);
|
||||
|
||||
/*
|
||||
* free the buffer allocated fot the VPDMA descriptor list, this should be
|
||||
* free the buffer allocated for the VPDMA descriptor list, this should be
|
||||
* called when the user doesn't want to use VPDMA any more.
|
||||
*/
|
||||
void vpdma_free_desc_list(struct vpdma_desc_list *list)
|
||||
@ -790,7 +790,7 @@ static void dump_dtd(struct vpdma_dtd *dtd)
|
||||
* append an outbound data transfer descriptor to the given descriptor list,
|
||||
* this sets up a 'client to memory' VPDMA transfer for the given VPDMA channel
|
||||
*
|
||||
* @list: vpdma desc list to which we add this decriptor
|
||||
* @list: vpdma desc list to which we add this descriptor
|
||||
* @width: width of the image in pixels in memory
|
||||
* @c_rect: compose params of output image
|
||||
* @fmt: vpdma data format of the buffer
|
||||
@ -798,7 +798,7 @@ static void dump_dtd(struct vpdma_dtd *dtd)
|
||||
* max_width: enum for maximum width of data transfer
|
||||
* max_height: enum for maximum height of data transfer
|
||||
* chan: VPDMA channel
|
||||
* flags: VPDMA flags to configure some descriptor fileds
|
||||
* flags: VPDMA flags to configure some descriptor fields
|
||||
*/
|
||||
void vpdma_add_out_dtd(struct vpdma_desc_list *list, int width,
|
||||
int stride, const struct v4l2_rect *c_rect,
|
||||
@ -863,14 +863,14 @@ EXPORT_SYMBOL(vpdma_rawchan_add_out_dtd);
|
||||
* append an inbound data transfer descriptor to the given descriptor list,
|
||||
* this sets up a 'memory to client' VPDMA transfer for the given VPDMA channel
|
||||
*
|
||||
* @list: vpdma desc list to which we add this decriptor
|
||||
* @list: vpdma desc list to which we add this descriptor
|
||||
* @width: width of the image in pixels in memory(not the cropped width)
|
||||
* @c_rect: crop params of input image
|
||||
* @fmt: vpdma data format of the buffer
|
||||
* dma_addr: dma address as seen by VPDMA
|
||||
* chan: VPDMA channel
|
||||
* field: top or bottom field info of the input image
|
||||
* flags: VPDMA flags to configure some descriptor fileds
|
||||
* flags: VPDMA flags to configure some descriptor fields
|
||||
* frame_width/height: the complete width/height of the image presented to the
|
||||
* client (this makes sense when multiple channels are
|
||||
* connected to the same client, forming a larger frame)
|
||||
@ -1008,7 +1008,7 @@ unsigned int vpdma_get_list_mask(struct vpdma_data *vpdma, int irq_num)
|
||||
}
|
||||
EXPORT_SYMBOL(vpdma_get_list_mask);
|
||||
|
||||
/* clear previosuly occured list intterupts in the LIST_STAT register */
|
||||
/* clear previously occurred list interupts in the LIST_STAT register */
|
||||
void vpdma_clear_list_stat(struct vpdma_data *vpdma, int irq_num,
|
||||
int list_num)
|
||||
{
|
||||
|
||||
@ -876,7 +876,7 @@ static int set_srcdst_params(struct vpe_ctx *ctx)
|
||||
/*
|
||||
* we make sure that the source image has a 16 byte aligned
|
||||
* stride, we need to do the same for the motion vector buffer
|
||||
* by aligning it's stride to the next 16 byte boundry. this
|
||||
* by aligning it's stride to the next 16 byte boundary. this
|
||||
* extra space will not be used by the de-interlacer, but will
|
||||
* ensure that vpdma operates correctly
|
||||
*/
|
||||
|
||||
@ -296,7 +296,7 @@ static void brx_configure_stream(struct vsp1_entity *entity,
|
||||
/*
|
||||
* The hardware is extremely flexible but we have no userspace API to
|
||||
* expose all the parameters, nor is it clear whether we would have use
|
||||
* cases for all the supported modes. Let's just harcode the parameters
|
||||
* cases for all the supported modes. Let's just hardcode the parameters
|
||||
* to sane default values for now.
|
||||
*/
|
||||
|
||||
@ -373,7 +373,7 @@ static void brx_configure_stream(struct vsp1_entity *entity,
|
||||
vsp1_brx_write(brx, dlb, VI6_BRU_CTRL(i), ctrl);
|
||||
|
||||
/*
|
||||
* Harcode the blending formula to
|
||||
* Hardcode the blending formula to
|
||||
*
|
||||
* DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
|
||||
* DSTa = DSTa * (1 - SRCa) + SRCa
|
||||
|
||||
@ -166,7 +166,7 @@ EXPORT_SYMBOL_GPL(xvip_set_format_size);
|
||||
* the register, otherwise the bitmask is cleared from the register
|
||||
* when the flag @set is false.
|
||||
*
|
||||
* Fox eample, this function can be used to set a control with a boolean value
|
||||
* Fox example, this function can be used to set a control with a boolean value
|
||||
* requested by users. If the caller knows whether to set or clear in the first
|
||||
* place, the caller should call xvip_clr() or xvip_set() directly instead of
|
||||
* using this function.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user