mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 00:30:53 +07:00
[SCSI] bfa: Brocade-1860 Fabric Adapter 16Gbs support and flash controller fixes.
- Added support for 16Gbps. - Added logic to flush pending mailbox command queue when IOC is disabled. - Fix to Halt the flash controller during fw initialization - since when asic blck is programmed flash controller's continuous access blocks f/w access to flash. - Added new asic based card types and modified IOC get card model routine. - Added PLL init fix to do LPU reset every time we do a memory initialization, since not doing so will cause LPU to be uninitialized during driver load. - Added fix to Halt flash controller before PLL initialization. Signed-off-by: Krishna Gudipati <kgudipat@brocade.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
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8b070b4a02
@ -40,6 +40,11 @@ enum {
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BFA_MFG_TYPE_ASTRA = 807, /* Astra mezz card */
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BFA_MFG_TYPE_LIGHTNING_P0 = 902, /* Lightning mezz card - old */
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BFA_MFG_TYPE_LIGHTNING = 1741, /* Lightning mezz card */
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BFA_MFG_TYPE_PROWLER_F = 1560, /* Prowler FC only cards */
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BFA_MFG_TYPE_PROWLER_N = 1410, /* Prowler NIC only cards */
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BFA_MFG_TYPE_PROWLER_C = 1710, /* Prowler CNA only cards */
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BFA_MFG_TYPE_PROWLER_D = 1860, /* Prowler Dual cards */
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BFA_MFG_TYPE_CHINOOK = 1867, /* Chinook cards */
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BFA_MFG_TYPE_INVALID = 0, /* Invalid card type */
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};
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@ -53,7 +58,8 @@ enum {
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(type) == BFA_MFG_TYPE_WANCHESE || \
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(type) == BFA_MFG_TYPE_ASTRA || \
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(type) == BFA_MFG_TYPE_LIGHTNING_P0 || \
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(type) == BFA_MFG_TYPE_LIGHTNING))
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(type) == BFA_MFG_TYPE_LIGHTNING || \
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(type) == BFA_MFG_TYPE_CHINOOK))
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/*
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* Check if the card having old wwn/mac handling
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@ -337,6 +343,11 @@ struct bfa_ioc_attr_s {
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#define BFA_MFG_SUPPLIER_PARTNUM_SIZE 20
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#define BFA_MFG_SUPPLIER_SERIALNUM_SIZE 20
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#define BFA_MFG_SUPPLIER_REVISION_SIZE 4
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/*
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* Initial capability definition
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*/
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#define BFA_MFG_IC_FC 0x01
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#define BFA_MFG_IC_ETH 0x02
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#pragma pack(1)
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@ -425,7 +436,8 @@ enum bfa_port_speed {
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BFA_PORT_SPEED_16GBPS = 16,
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BFA_PORT_SPEED_AUTO =
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(BFA_PORT_SPEED_1GBPS | BFA_PORT_SPEED_2GBPS |
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BFA_PORT_SPEED_4GBPS | BFA_PORT_SPEED_8GBPS),
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BFA_PORT_SPEED_4GBPS | BFA_PORT_SPEED_8GBPS |
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BFA_PORT_SPEED_16GBPS),
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};
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#define bfa_port_speed_t enum bfa_port_speed
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@ -66,6 +66,9 @@ fc_rpsc_operspeed_to_bfa_speed(enum fc_rpsc_op_speed speed)
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case RPSC_OP_SPEED_8G:
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return BFA_PORT_SPEED_8GBPS;
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case RPSC_OP_SPEED_16G:
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return BFA_PORT_SPEED_16GBPS;
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case RPSC_OP_SPEED_10G:
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return BFA_PORT_SPEED_10GBPS;
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@ -94,6 +97,9 @@ fc_bfa_speed_to_rpsc_operspeed(enum bfa_port_speed op_speed)
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case BFA_PORT_SPEED_8GBPS:
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return RPSC_OP_SPEED_8G;
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case BFA_PORT_SPEED_16GBPS:
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return RPSC_OP_SPEED_16G;
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case BFA_PORT_SPEED_10GBPS:
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return RPSC_OP_SPEED_10G;
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@ -85,7 +85,7 @@ static void bfa_ioc_send_disable(struct bfa_ioc_s *ioc);
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static void bfa_ioc_send_getattr(struct bfa_ioc_s *ioc);
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static void bfa_ioc_hb_monitor(struct bfa_ioc_s *ioc);
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static void bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc);
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static void bfa_ioc_mbox_hbfail(struct bfa_ioc_s *ioc);
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static void bfa_ioc_mbox_flush(struct bfa_ioc_s *ioc);
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static void bfa_ioc_recover(struct bfa_ioc_s *ioc);
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static void bfa_ioc_check_attr_wwns(struct bfa_ioc_s *ioc);
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static void bfa_ioc_event_notify(struct bfa_ioc_s *ioc ,
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@ -971,6 +971,7 @@ bfa_iocpf_sm_disabling_sync(struct bfa_iocpf_s *iocpf, enum iocpf_event event)
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static void
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bfa_iocpf_sm_disabled_entry(struct bfa_iocpf_s *iocpf)
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{
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bfa_ioc_mbox_flush(iocpf->ioc);
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bfa_fsm_send_event(iocpf->ioc, IOC_E_DISABLED);
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}
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@ -1081,7 +1082,7 @@ bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf_s *iocpf)
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/*
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* Flush any queued up mailbox requests.
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*/
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bfa_ioc_mbox_hbfail(iocpf->ioc);
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bfa_ioc_mbox_flush(iocpf->ioc);
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bfa_ioc_hw_sem_get(iocpf->ioc);
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}
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@ -1399,6 +1400,7 @@ bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force)
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if (!fwvalid) {
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bfa_ioc_boot(ioc, boot_type, boot_env);
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bfa_ioc_poll_fwinit(ioc);
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return;
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}
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@ -1434,6 +1436,7 @@ bfa_ioc_hwinit(struct bfa_ioc_s *ioc, bfa_boolean_t force)
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* Initialize the h/w for any other states.
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*/
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bfa_ioc_boot(ioc, boot_type, boot_env);
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bfa_ioc_poll_fwinit(ioc);
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}
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static void
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@ -1668,7 +1671,7 @@ bfa_ioc_mbox_poll(struct bfa_ioc_s *ioc)
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* Cleanup any pending requests.
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*/
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static void
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bfa_ioc_mbox_hbfail(struct bfa_ioc_s *ioc)
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bfa_ioc_mbox_flush(struct bfa_ioc_s *ioc)
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{
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struct bfa_ioc_mbox_mod_s *mod = &ioc->mbox_mod;
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struct bfa_mbox_cmd_s *cmd;
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@ -2178,9 +2181,7 @@ bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc)
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struct bfi_mbmsg_s m;
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int mc;
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if (!bfa_ioc_msgget(ioc, &m))
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return;
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if (bfa_ioc_msgget(ioc, &m)) {
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/*
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* Treat IOC message class as special.
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*/
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@ -2196,6 +2197,14 @@ bfa_ioc_mbox_isr(struct bfa_ioc_s *ioc)
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mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
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}
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bfa_ioc_lpu_read_stat(ioc);
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/*
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* Try to send pending mailbox commands
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*/
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bfa_ioc_mbox_poll(ioc);
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}
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void
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bfa_ioc_error_isr(struct bfa_ioc_s *ioc)
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{
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@ -2392,6 +2401,31 @@ bfa_ioc_get_adapter_model(struct bfa_ioc_s *ioc, char *model)
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/*
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* model name
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*/
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if (ioc->asic_gen == BFI_ASIC_GEN_CT2) {
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int np = bfa_ioc_get_nports(ioc);
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char c;
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switch (ioc_attr->card_type) {
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case BFA_MFG_TYPE_PROWLER_F:
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case BFA_MFG_TYPE_PROWLER_N:
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case BFA_MFG_TYPE_PROWLER_C:
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snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN,
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"%s-%u-%u",
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BFA_MFG_NAME, ioc_attr->card_type, np);
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break;
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case BFA_MFG_TYPE_PROWLER_D:
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if (ioc_attr->ic == BFA_MFG_IC_FC)
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c = 'F';
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else
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c = 'P';
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snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN,
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"%s-%u-%u%c",
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BFA_MFG_NAME, ioc_attr->card_type, np, c);
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break;
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default:
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break;
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}
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} else
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snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
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BFA_MFG_NAME, ioc_attr->card_type);
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}
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@ -136,6 +136,7 @@ struct bfa_ioc_regs_s {
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void __iomem *hfn_mbox;
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void __iomem *lpu_mbox_cmd;
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void __iomem *lpu_mbox;
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void __iomem *lpu_read_stat;
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void __iomem *pss_ctl_reg;
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void __iomem *pss_err_status_reg;
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void __iomem *app_pll_fast_ctl_reg;
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@ -277,6 +278,7 @@ struct bfa_ioc_hwif_s {
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void (*ioc_sync_leave) (struct bfa_ioc_s *ioc);
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void (*ioc_sync_ack) (struct bfa_ioc_s *ioc);
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bfa_boolean_t (*ioc_sync_complete) (struct bfa_ioc_s *ioc);
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bfa_boolean_t (*ioc_lpu_read_stat) (struct bfa_ioc_s *ioc);
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};
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#define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
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@ -338,7 +340,10 @@ bfa_status_t bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode);
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} while (0)
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#define bfa_ioc_ownership_reset(__ioc) \
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((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
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#define bfa_ioc_lpu_read_stat(__ioc) do { \
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if ((__ioc)->ioc_hwif->ioc_lpu_read_stat) \
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((__ioc)->ioc_hwif->ioc_lpu_read_stat(__ioc)); \
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} while (0)
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void bfa_ioc_set_cb_hwif(struct bfa_ioc_s *ioc);
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void bfa_ioc_set_ct_hwif(struct bfa_ioc_s *ioc);
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@ -192,11 +192,14 @@ static struct { u32 hfn, lpu; } ct_p1reg[] = {
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{ HOSTFN3_LPU1_CMD_STAT, LPU1_HOSTFN3_CMD_STAT }
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};
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static struct { uint32_t hfn_mbox, lpu_mbox, hfn_pgn, hfn, lpu; } ct2_reg[] = {
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static struct { uint32_t hfn_mbox, lpu_mbox, hfn_pgn, hfn, lpu, lpu_read; }
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ct2_reg[] = {
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{ CT2_HOSTFN_LPU0_MBOX0, CT2_LPU0_HOSTFN_MBOX0, CT2_HOSTFN_PAGE_NUM,
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CT2_HOSTFN_LPU0_CMD_STAT, CT2_LPU0_HOSTFN_CMD_STAT },
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CT2_HOSTFN_LPU0_CMD_STAT, CT2_LPU0_HOSTFN_CMD_STAT,
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CT2_HOSTFN_LPU0_READ_STAT},
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{ CT2_HOSTFN_LPU1_MBOX0, CT2_LPU1_HOSTFN_MBOX0, CT2_HOSTFN_PAGE_NUM,
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CT2_HOSTFN_LPU1_CMD_STAT, CT2_LPU1_HOSTFN_CMD_STAT },
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CT2_HOSTFN_LPU1_CMD_STAT, CT2_LPU1_HOSTFN_CMD_STAT,
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CT2_HOSTFN_LPU1_READ_STAT},
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};
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static void
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@ -271,6 +274,7 @@ bfa_ioc_ct2_reg_init(struct bfa_ioc_s *ioc)
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ioc->ioc_regs.host_page_num_fn = rb + ct2_reg[port].hfn_pgn;
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ioc->ioc_regs.hfn_mbox_cmd = rb + ct2_reg[port].hfn;
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ioc->ioc_regs.lpu_mbox_cmd = rb + ct2_reg[port].lpu;
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ioc->ioc_regs.lpu_read_stat = rb + ct2_reg[port].lpu_read;
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if (port == 0) {
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ioc->ioc_regs.heartbeat = rb + CT2_BFA_IOC0_HBEAT_REG;
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@ -379,6 +383,20 @@ bfa_ioc_ct_isr_mode_set(struct bfa_ioc_s *ioc, bfa_boolean_t msix)
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writel(r32, rb + FNC_PERS_REG);
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}
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bfa_boolean_t
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bfa_ioc_ct2_lpu_read_stat(struct bfa_ioc_s *ioc)
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{
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u32 r32;
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r32 = readl(ioc->ioc_regs.lpu_read_stat);
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if (r32) {
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writel(1, ioc->ioc_regs.lpu_read_stat);
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return BFA_TRUE;
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}
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return BFA_FALSE;
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}
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/*
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* Cleanup hw semaphore and usecnt registers
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*/
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@ -540,6 +558,7 @@ bfa_ioc_set_ct2_hwif(struct bfa_ioc_s *ioc)
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hwif_ct2.ioc_pll_init = bfa_ioc_ct2_pll_init;
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hwif_ct2.ioc_reg_init = bfa_ioc_ct2_reg_init;
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hwif_ct2.ioc_map_port = bfa_ioc_ct2_map_port;
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hwif_ct2.ioc_lpu_read_stat = bfa_ioc_ct2_lpu_read_stat;
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hwif_ct2.ioc_isr_mode_set = NULL;
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ioc->ioc_hwif = &hwif_ct2;
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}
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@ -791,15 +810,26 @@ bfa_ioc_ct2_mem_init(void __iomem *rb, enum bfi_asic_mode mode)
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bfa_status_t
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bfa_ioc_ct2_pll_init(void __iomem *rb, enum bfi_asic_mode mode)
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{
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u32 r32;
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/*
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* Initialize PLL if not already done by NFC
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*/
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r32 = readl((rb + CT2_WGN_STATUS));
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writel(__HALT_NFC_CONTROLLER, (rb + CT2_NFC_CSR_SET_REG));
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bfa_ioc_ct2_sclk_init(rb, mode);
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bfa_ioc_ct2_lclk_init(rb, mode);
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bfa_ioc_ct2_mem_init(rb, mode);
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/*
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* Disable flash presence to NFC by clearing GPIO 0
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* Announce flash device presence, if flash was corrupted.
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*/
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if (r32 == (__WGN_READY | __GLBL_PF_VF_CFG_RDY)) {
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writel(0, (rb + PSS_GPIO_OUT_REG));
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writel(1, (rb + PSS_GPIO_OE_REG));
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}
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writel(BFI_IOC_UNINIT, (rb + CT2_BFA_IOC0_STATE_REG));
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writel(BFI_IOC_UNINIT, (rb + CT2_BFA_IOC1_STATE_REG));
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@ -1348,8 +1348,7 @@ bfad_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
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int error = -ENODEV, retval;
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/* For single port cards - only claim function 0 */
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if ((pdev->device == BFA_PCI_DEVICE_ID_FC_8G1P ||
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pdev->device == BFA_PCI_DEVICE_ID_CT2) &&
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if ((pdev->device == BFA_PCI_DEVICE_ID_FC_8G1P) &&
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(PCI_FUNC(pdev->devfn) != 0))
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return -ENODEV;
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@ -218,6 +218,9 @@ bfad_im_get_host_speed(struct Scsi_Host *shost)
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case BFA_PORT_SPEED_10GBPS:
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fc_host_speed(shost) = FC_PORTSPEED_10GBIT;
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break;
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case BFA_PORT_SPEED_16GBPS:
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fc_host_speed(shost) = FC_PORTSPEED_16GBIT;
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break;
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case BFA_PORT_SPEED_8GBPS:
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fc_host_speed(shost) = FC_PORTSPEED_8GBIT;
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break;
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@ -925,7 +925,10 @@ bfad_im_supported_speeds(struct bfa_s *bfa)
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return 0;
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bfa_ioc_get_attr(&bfa->ioc, ioc_attr);
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if (ioc_attr->adapter_attr.max_speed == BFA_PORT_SPEED_8GBPS) {
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if (ioc_attr->adapter_attr.max_speed == BFA_PORT_SPEED_16GBPS)
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supported_speed |= FC_PORTSPEED_16GBIT | FC_PORTSPEED_8GBIT |
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FC_PORTSPEED_4GBIT | FC_PORTSPEED_2GBIT;
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else if (ioc_attr->adapter_attr.max_speed == BFA_PORT_SPEED_8GBPS) {
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if (ioc_attr->adapter_attr.is_mezz) {
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supported_speed |= FC_PORTSPEED_8GBIT |
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FC_PORTSPEED_4GBIT |
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@ -251,7 +251,7 @@ struct bfi_ioc_attr_s {
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u32 adapter_prop; /* adapter properties */
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u16 maxfrsize; /* max receive frame size */
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char asic_rev;
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u8 rsvd_d;
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u8 ic; /* initial capability */
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char fw_version[BFA_VERSION_LEN];
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char optrom_version[BFA_VERSION_LEN];
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struct bfa_mfg_vpd_s vpd;
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@ -275,6 +275,8 @@ enum {
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#define CT2_HOSTFN_LPU1_CMD_STAT (CT2_PCI_CPQ_BASE + 0x84)
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#define CT2_LPU0_HOSTFN_CMD_STAT (CT2_PCI_CPQ_BASE + 0x88)
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#define CT2_LPU1_HOSTFN_CMD_STAT (CT2_PCI_CPQ_BASE + 0x8c)
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#define CT2_HOSTFN_LPU0_READ_STAT (CT2_PCI_CPQ_BASE + 0x90)
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#define CT2_HOSTFN_LPU1_READ_STAT (CT2_PCI_CPQ_BASE + 0x94)
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#define CT2_HOST_SEM0_REG 0x000148f0
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#define CT2_HOST_SEM1_REG 0x000148f4
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#define CT2_HOST_SEM2_REG 0x000148f8
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@ -330,6 +332,11 @@ enum {
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#define CT2_PMM_1T_CONTROL_REG_P0 0x0002381c
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#define __PMM_1T_PNDB_P 0x00000002
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#define CT2_PMM_1T_CONTROL_REG_P1 0x00023c1c
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#define CT2_WGN_STATUS 0x00014990
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#define __WGN_READY 0x00000400
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#define __GLBL_PF_VF_CFG_RDY 0x00000200
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#define CT2_NFC_CSR_SET_REG 0x00027424
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#define __HALT_NFC_CONTROLLER 0x00000002
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/*
|
||||
* Name semaphore registers based on usage
|
||||
|
Loading…
Reference in New Issue
Block a user