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drm/amdgpu: add gpu_info firmware (v3)
Add a new gpu info firmware to store gpu specific configuration data. This allows us to store hw constants in a unified place. v2: adjust structure and elements v3: further restructure Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Tested-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -197,6 +197,27 @@ void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr)
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}
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}
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void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr)
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{
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uint16_t version_major = le16_to_cpu(hdr->header_version_major);
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uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
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DRM_DEBUG("GPU_INFO\n");
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amdgpu_ucode_print_common_hdr(hdr);
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if (version_major == 1) {
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const struct gpu_info_firmware_header_v1_0 *gpu_info_hdr =
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container_of(hdr, struct gpu_info_firmware_header_v1_0, header);
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DRM_DEBUG("version_major: %u\n",
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le16_to_cpu(gpu_info_hdr->version_major));
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DRM_DEBUG("version_minor: %u\n",
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le16_to_cpu(gpu_info_hdr->version_minor));
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} else {
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DRM_ERROR("Unknown gpu_info ucode version: %u.%u\n", version_major, version_minor);
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}
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}
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int amdgpu_ucode_validate(const struct firmware *fw)
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{
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const struct common_firmware_header *hdr =
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@ -113,6 +113,29 @@ struct sdma_firmware_header_v1_1 {
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uint32_t digest_size;
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};
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/* gpu info payload */
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struct gpu_info_firmware_v1_0 {
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uint32_t gc_num_se;
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uint32_t gc_num_cu_per_sh;
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uint32_t gc_num_sh_per_se;
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uint32_t gc_num_rb_per_se;
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uint32_t gc_num_tccs;
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uint32_t gc_num_gprs;
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uint32_t gc_num_max_gs_thds;
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uint32_t gc_gs_table_depth;
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uint32_t gc_gsprim_buff_depth;
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uint32_t gc_parameter_cache_depth;
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uint32_t gc_double_offchip_lds_buffer;
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uint32_t gc_wave_size;
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};
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/* version_major=1, version_minor=0 */
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struct gpu_info_firmware_header_v1_0 {
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struct common_firmware_header header;
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uint16_t version_major; /* version */
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uint16_t version_minor; /* version */
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};
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/* header is fixed size */
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union amdgpu_firmware_header {
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struct common_firmware_header common;
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@ -124,6 +147,7 @@ union amdgpu_firmware_header {
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struct rlc_firmware_header_v2_0 rlc_v2_0;
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struct sdma_firmware_header_v1_0 sdma;
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struct sdma_firmware_header_v1_1 sdma_v1_1;
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struct gpu_info_firmware_header_v1_0 gpu_info;
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uint8_t raw[0x100];
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};
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@ -184,6 +208,7 @@ void amdgpu_ucode_print_smc_hdr(const struct common_firmware_header *hdr);
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void amdgpu_ucode_print_gfx_hdr(const struct common_firmware_header *hdr);
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void amdgpu_ucode_print_rlc_hdr(const struct common_firmware_header *hdr);
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void amdgpu_ucode_print_sdma_hdr(const struct common_firmware_header *hdr);
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void amdgpu_ucode_print_gpu_info_hdr(const struct common_firmware_header *hdr);
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int amdgpu_ucode_validate(const struct firmware *fw);
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bool amdgpu_ucode_hdr_version(union amdgpu_firmware_header *hdr,
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uint16_t hdr_major, uint16_t hdr_minor);
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