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drm/amdgpu: disable VCN2.5 ib test for Arcturus sriov
currently using TMR loading VCN fw MMSCH would fail to init after FLR, just disable ib test for temporarily daily testing, continuing debug with mm team. Signed-off-by: Jane Jian <Jane.Jian@amd.com> Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -491,9 +491,14 @@ static int amdgpu_vcn_dec_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
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int amdgpu_vcn_dec_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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{
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struct amdgpu_device *adev = ring->adev;
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struct dma_fence *fence;
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long r;
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/* temporarily disable ib test for sriov */
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if (amdgpu_sriov_vf(adev))
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return 0;
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r = amdgpu_vcn_dec_get_create_msg(ring, 1, NULL);
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if (r)
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goto error;
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@ -649,10 +654,15 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han
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int amdgpu_vcn_enc_ring_test_ib(struct amdgpu_ring *ring, long timeout)
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{
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struct amdgpu_device *adev = ring->adev;
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struct dma_fence *fence = NULL;
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struct amdgpu_bo *bo = NULL;
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long r;
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/* temporarily disable ib test for sriov */
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if (amdgpu_sriov_vf(adev))
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return 0;
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r = amdgpu_bo_create_reserved(ring->adev, 128 * 1024, PAGE_SIZE,
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AMDGPU_GEM_DOMAIN_VRAM,
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&bo, NULL, NULL);
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