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ARM: zynq: DT: Add missing address for L2 pl310

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By in sync with others node and add also baseaddr
to the node name.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2014-09-24 15:16:01 +02:00
parent e8b397754a
commit 8abef06b63
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/zynq-7000.dtsi
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@ -136,7 +136,7 @@ intc: interrupt-controller@f8f01000 {
<0xF8F00100 0x100>;
};
L2: cache-controller {
L2: cache-controller@f8f02000 {
compatible = "arm,pl310-cache";
reg = <0xF8F02000 0x1000>;
arm,data-latency = <3 2 2>;