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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-13 14:56:46 +07:00
drm/i915: move flushing list processing to i915_retire_commands
... instead of threading flush_domains through the execbuf code to i915_add_request. With this change 2 small cleanups are possible (likewise the majority of the patch): - The flush_domains parameter of i915_add_request is always 0. Drop it and the corresponding logic. - Ditto for the seqno param of i915_gem_process_flushing_list. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Daniel Vetter
Chris Wilson
parent
a6910434e1
commit
8a1a49f954
@ -991,12 +991,15 @@ int i915_gpu_idle(struct drm_device *dev);
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int i915_gem_idle(struct drm_device *dev);
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uint32_t i915_add_request(struct drm_device *dev,
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struct drm_file *file_priv,
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uint32_t flush_domains,
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struct intel_ring_buffer *ring);
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int i915_do_wait_request(struct drm_device *dev,
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uint32_t seqno, int interruptible,
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struct intel_ring_buffer *ring);
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uint32_t seqno,
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bool interruptible,
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struct intel_ring_buffer *ring);
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int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
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void i915_gem_process_flushing_list(struct drm_device *dev,
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uint32_t flush_domains,
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struct intel_ring_buffer *ring);
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int i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj,
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int write);
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int i915_gem_object_set_to_display_plane(struct drm_gem_object *obj);
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@ -1570,9 +1570,9 @@ i915_gem_object_move_to_inactive(struct drm_gem_object *obj)
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i915_verify_inactive(dev, __FILE__, __LINE__);
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}
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static void
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void
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i915_gem_process_flushing_list(struct drm_device *dev,
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uint32_t flush_domains, uint32_t seqno,
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uint32_t flush_domains,
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struct intel_ring_buffer *ring)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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@ -1590,7 +1590,7 @@ i915_gem_process_flushing_list(struct drm_device *dev,
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obj->write_domain = 0;
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list_del_init(&obj_priv->gpu_write_list);
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i915_gem_object_move_to_active(obj, seqno, ring);
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i915_gem_object_move_to_active(obj, 0, ring);
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/* update the fence lru list */
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if (obj_priv->fence_reg != I915_FENCE_REG_NONE) {
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@ -1608,8 +1608,9 @@ i915_gem_process_flushing_list(struct drm_device *dev,
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}
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uint32_t
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i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
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uint32_t flush_domains, struct intel_ring_buffer *ring)
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i915_add_request(struct drm_device *dev,
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struct drm_file *file_priv,
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struct intel_ring_buffer *ring)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_file_private *i915_file_priv = NULL;
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@ -1624,7 +1625,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
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if (request == NULL)
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return 0;
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seqno = ring->add_request(dev, ring, file_priv, flush_domains);
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seqno = ring->add_request(dev, ring, file_priv, 0);
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request->seqno = seqno;
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request->ring = ring;
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@ -1639,12 +1640,6 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
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INIT_LIST_HEAD(&request->client_list);
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}
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/* Associate any objects on the flushing list matching the write
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* domain we're flushing with our request.
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*/
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if (flush_domains != 0)
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i915_gem_process_flushing_list(dev, flush_domains, seqno, ring);
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if (!dev_priv->mm.suspended) {
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mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
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if (was_empty)
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@ -1659,7 +1654,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
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* Ensures that all commands in the ring are finished
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* before signalling the CPU
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*/
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static uint32_t
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static void
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i915_retire_commands(struct drm_device *dev, struct intel_ring_buffer *ring)
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{
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uint32_t flush_domains = 0;
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@ -1670,7 +1665,6 @@ i915_retire_commands(struct drm_device *dev, struct intel_ring_buffer *ring)
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ring->flush(dev, ring,
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I915_GEM_DOMAIN_COMMAND, flush_domains);
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return flush_domains;
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}
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/**
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@ -1837,7 +1831,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
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int
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i915_do_wait_request(struct drm_device *dev, uint32_t seqno,
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int interruptible, struct intel_ring_buffer *ring)
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bool interruptible, struct intel_ring_buffer *ring)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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u32 ier;
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@ -1846,7 +1840,7 @@ i915_do_wait_request(struct drm_device *dev, uint32_t seqno,
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BUG_ON(seqno == 0);
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if (seqno == dev_priv->next_seqno) {
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seqno = i915_add_request(dev, NULL, 0, ring);
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seqno = i915_add_request(dev, NULL, ring);
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if (seqno == 0)
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return -ENOMEM;
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}
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@ -1934,17 +1928,6 @@ i915_gem_flush(struct drm_device *dev,
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dev_priv->bsd_ring.flush(dev, &dev_priv->bsd_ring,
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invalidate_domains,
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flush_domains);
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/* Associate any objects on the flushing list matching the write
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* domain we're flushing with the next request.
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*/
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if (flush_domains != 0) {
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i915_gem_process_flushing_list(dev, flush_domains, 0,
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&dev_priv->render_ring);
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if (HAS_BSD(dev))
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i915_gem_process_flushing_list(dev, flush_domains, 0,
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&dev_priv->bsd_ring);
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}
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}
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/**
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@ -2078,24 +2061,23 @@ i915_gpu_idle(struct drm_device *dev)
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/* Flush everything onto the inactive list. */
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i915_gem_flush(dev, I915_GEM_GPU_DOMAINS, I915_GEM_GPU_DOMAINS);
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seqno1 = i915_add_request(dev, NULL, 0,
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&dev_priv->render_ring);
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seqno1 = i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (seqno1 == 0)
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return -ENOMEM;
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ret = i915_wait_request(dev, seqno1, &dev_priv->render_ring);
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if (ret)
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return ret;
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if (HAS_BSD(dev)) {
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seqno2 = i915_add_request(dev, NULL, 0,
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&dev_priv->bsd_ring);
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seqno2 = i915_add_request(dev, NULL, &dev_priv->bsd_ring);
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if (seqno2 == 0)
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return -ENOMEM;
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ret = i915_wait_request(dev, seqno2, &dev_priv->bsd_ring);
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if (ret)
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return ret;
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}
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return ret;
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return 0;
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}
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int
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@ -2641,7 +2623,7 @@ i915_gem_object_flush_gpu_write_domain(struct drm_gem_object *obj)
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/* Queue the GPU write cache flushing we need. */
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old_write_domain = obj->write_domain;
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i915_gem_flush(dev, 0, obj->write_domain);
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if (i915_add_request(dev, NULL, obj->write_domain, obj_priv->ring) == 0)
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if (i915_add_request(dev, NULL, obj_priv->ring) == 0)
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return -ENOMEM;
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trace_i915_gem_object_change_domain(obj,
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@ -3564,7 +3546,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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struct drm_i915_gem_relocation_entry *relocs = NULL;
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int ret = 0, ret2, i, pinned = 0;
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uint64_t exec_offset;
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uint32_t seqno, flush_domains, reloc_index;
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uint32_t seqno, reloc_index;
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int pin_tries, flips;
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struct intel_ring_buffer *ring = NULL;
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@ -3780,13 +3762,11 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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}
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if (dev_priv->render_ring.outstanding_lazy_request) {
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(void)i915_add_request(dev, file_priv, 0,
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&dev_priv->render_ring);
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(void)i915_add_request(dev, file_priv, &dev_priv->render_ring);
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dev_priv->render_ring.outstanding_lazy_request = false;
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}
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if (dev_priv->bsd_ring.outstanding_lazy_request) {
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(void)i915_add_request(dev, file_priv, 0,
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&dev_priv->bsd_ring);
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(void)i915_add_request(dev, file_priv, &dev_priv->bsd_ring);
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dev_priv->bsd_ring.outstanding_lazy_request = false;
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}
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@ -3835,7 +3815,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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* Ensure that the commands in the batch buffer are
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* finished before the interrupt fires
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*/
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flush_domains = i915_retire_commands(dev, ring);
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i915_retire_commands(dev, ring);
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i915_verify_inactive(dev, __FILE__, __LINE__);
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@ -3846,7 +3826,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
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* *some* interrupts representing completion of buffers that we can
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* wait on when trying to clear up gtt space).
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*/
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seqno = i915_add_request(dev, file_priv, flush_domains, ring);
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seqno = i915_add_request(dev, file_priv, ring);
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BUG_ON(seqno == 0);
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for (i = 0; i < args->buffer_count; i++) {
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struct drm_gem_object *obj = object_list[i];
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@ -4244,7 +4224,7 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
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*/
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if (obj->write_domain) {
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i915_gem_flush(dev, 0, obj->write_domain);
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(void)i915_add_request(dev, file_priv, obj->write_domain, obj_priv->ring);
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(void)i915_add_request(dev, file_priv, obj_priv->ring);
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}
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/* Update the active list for the hardware's current position.
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@ -230,7 +230,7 @@ static int intel_overlay_on(struct intel_overlay *overlay)
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, 0, &dev_priv->render_ring);
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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@ -269,7 +269,7 @@ static void intel_overlay_continue(struct intel_overlay *overlay,
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, 0, &dev_priv->render_ring);
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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}
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static int intel_overlay_wait_flip(struct intel_overlay *overlay)
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@ -301,7 +301,7 @@ static int intel_overlay_wait_flip(struct intel_overlay *overlay)
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, 0, &dev_priv->render_ring);
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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@ -342,7 +342,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, 0, &dev_priv->render_ring);
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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@ -362,7 +362,7 @@ static int intel_overlay_off(struct intel_overlay *overlay)
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ADVANCE_LP_RING();
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overlay->last_flip_req =
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i915_add_request(dev, NULL, 0, &dev_priv->render_ring);
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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@ -409,7 +409,7 @@ int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
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if (overlay->last_flip_req == 0) {
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overlay->last_flip_req =
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i915_add_request(dev, NULL, 0, &dev_priv->render_ring);
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i915_add_request(dev, NULL, &dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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}
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@ -439,8 +439,9 @@ int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
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OUT_RING(MI_NOOP);
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ADVANCE_LP_RING();
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overlay->last_flip_req = i915_add_request(dev, NULL,
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0, &dev_priv->render_ring);
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overlay->last_flip_req =
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i915_add_request(dev, NULL,
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&dev_priv->render_ring);
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if (overlay->last_flip_req == 0)
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return -ENOMEM;
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@ -116,6 +116,8 @@ render_ring_flush(struct drm_device *dev,
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intel_ring_emit(dev, ring, MI_NOOP);
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intel_ring_advance(dev, ring);
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}
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i915_gem_process_flushing_list(dev, flush_domains, ring);
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}
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static unsigned int render_ring_get_head(struct drm_device *dev,
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@ -384,6 +386,8 @@ bsd_ring_flush(struct drm_device *dev,
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intel_ring_emit(dev, ring, MI_FLUSH);
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intel_ring_emit(dev, ring, MI_NOOP);
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intel_ring_advance(dev, ring);
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i915_gem_process_flushing_list(dev, flush_domains, ring);
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}
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static inline unsigned int bsd_ring_get_head(struct drm_device *dev,
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