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drm/i915/icl: Disable DIP on MST ports with the transcoder clock still on
According to BSpec the Data Island Packet should be disabled after disabling the transcoder, but before the transcoder clock select is set to none. On an ICL RVP, daisy-chained MST config not following this leads to a hang with the following MCE when disabling the output: [ 870.948739] mce: [Hardware Error]: CPU 0: Machine Check Exception: 5 Bank 6: ba00000011000402 [ 871.019212] mce: [Hardware Error]: RIP !INEXACT! 10:<ffffffff81aca652> {poll_idle+0x92/0xb0} [ 871.019212] mce: [Hardware Error]: TSC 135a261fe61 [ 871.019212] mce: [Hardware Error]: PROCESSOR 0:706e5 TIME 1591739604 SOCKET 0 APIC 0 microcode 20 [ 871.019212] mce: [Hardware Error]: Run the above through 'mcelog --ascii' [ 871.019212] mce: [Hardware Error]: Machine check: Processor context corrupt [ 871.019212] Kernel panic - not syncing: Fatal machine check [ 871.019212] Kernel Offset: disabled Bspec: 4287 Fixes:fa37a21327
("drm/i915: Stop sending DP SDPs on ddi disable") Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200609220616.6015-1-imre.deak@intel.com (cherry picked from commitc980216dd2
) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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@ -3472,7 +3472,9 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
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INTEL_OUTPUT_DP_MST);
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enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
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intel_dp_set_infoframes(encoder, false, old_crtc_state, old_conn_state);
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if (!is_mst)
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intel_dp_set_infoframes(encoder, false,
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old_crtc_state, old_conn_state);
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/*
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* Power down sink before disabling the port, otherwise we end
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@ -397,6 +397,14 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
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*/
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drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
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false);
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/*
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* BSpec 4287: disable DIP after the transcoder is disabled and before
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* the transcoder clock select is set to none.
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*/
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if (last_mst_stream)
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intel_dp_set_infoframes(&intel_dig_port->base, false,
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old_crtc_state, NULL);
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/*
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* From TGL spec: "If multi-stream slave transcoder: Configure
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* Transcoder Clock Select to direct no clock to the transcoder"
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