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clk: tegra: Have EMC clock implement determine_rate()
As opposed to round_rate(), determine_rate() can take rate constraints into account when choosing the best rate. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -116,8 +116,11 @@ static unsigned long emc_recalc_rate(struct clk_hw *hw,
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* safer since things have EMC rate floors. Also don't touch parent_rate
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* since we don't want the CCF to play with our parent clocks.
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*/
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static long emc_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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static long emc_determine_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long min_rate,
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unsigned long max_rate,
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unsigned long *best_parent_rate,
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struct clk_hw **best_parent_hw)
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{
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struct tegra_clk_emc *tegra;
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u8 ram_code = tegra_read_ram_code();
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@ -126,18 +129,26 @@ static long emc_round_rate(struct clk_hw *hw, unsigned long rate,
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tegra = container_of(hw, struct tegra_clk_emc, hw);
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for (i = 0; i < tegra->num_timings; i++) {
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if (tegra->timings[i].ram_code != ram_code)
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continue;
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for (i = 0; i < tegra->num_timings; i++) {
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if (tegra->timings[i].ram_code != ram_code)
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continue;
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timing = tegra->timings + i;
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timing = tegra->timings + i;
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if (timing->rate >= rate)
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return timing->rate;
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}
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if (timing->rate > max_rate) {
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i = min(i, 1);
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return tegra->timings[i - 1].rate;
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}
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if (timing)
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return timing->rate;
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if (timing->rate < min_rate)
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continue;
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if (timing->rate >= rate)
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return timing->rate;
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}
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if (timing)
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return timing->rate;
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return __clk_get_rate(hw->clk);
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}
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@ -451,7 +462,7 @@ static int load_timings_from_dt(struct tegra_clk_emc *tegra,
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static const struct clk_ops tegra_clk_emc_ops = {
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.recalc_rate = emc_recalc_rate,
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.round_rate = emc_round_rate,
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.determine_rate = emc_determine_rate,
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.set_rate = emc_set_rate,
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.get_parent = emc_get_parent,
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};
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