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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 21:46:47 +07:00
i40e: remove redundant code
Don't keep separate functions to enable and disable queues for the VFs. Just call the existing function that everybody else uses. Remove the unused functions. Change-Id: I15db9aad64a59e502bfe1e0fdab9b347ab85c12c Signed-off-by: Mitch Williams <mitch.a.williams@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Sibai Li <sibai.li@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Mitch Williams
Jeff Kirsher
parent
fc18eaa073
commit
88f6563d73
@ -101,130 +101,6 @@ static u16 i40e_vc_get_pf_queue_id(struct i40e_vf *vf, u8 vsi_idx,
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return pf_queue_id;
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}
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/**
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* i40e_ctrl_vsi_tx_queue
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* @vf: pointer to the vf info
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* @vsi_idx: index of VSI in PF struct
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* @vsi_queue_id: vsi relative queue index
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* @ctrl: control flags
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*
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* enable/disable/enable check/disable check
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**/
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static int i40e_ctrl_vsi_tx_queue(struct i40e_vf *vf, u16 vsi_idx,
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u16 vsi_queue_id,
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enum i40e_queue_ctrl ctrl)
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{
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struct i40e_pf *pf = vf->pf;
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struct i40e_hw *hw = &pf->hw;
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bool writeback = false;
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u16 pf_queue_id;
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int ret = 0;
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u32 reg;
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pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
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reg = rd32(hw, I40E_QTX_ENA(pf_queue_id));
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switch (ctrl) {
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case I40E_QUEUE_CTRL_ENABLE:
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reg |= I40E_QTX_ENA_QENA_REQ_MASK;
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writeback = true;
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break;
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case I40E_QUEUE_CTRL_ENABLECHECK:
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ret = (reg & I40E_QTX_ENA_QENA_STAT_MASK) ? 0 : -EPERM;
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break;
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case I40E_QUEUE_CTRL_DISABLE:
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reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
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writeback = true;
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break;
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case I40E_QUEUE_CTRL_DISABLECHECK:
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ret = (reg & I40E_QTX_ENA_QENA_STAT_MASK) ? -EPERM : 0;
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break;
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case I40E_QUEUE_CTRL_FASTDISABLE:
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reg |= I40E_QTX_ENA_FAST_QDIS_MASK;
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writeback = true;
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break;
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case I40E_QUEUE_CTRL_FASTDISABLECHECK:
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ret = (reg & I40E_QTX_ENA_QENA_STAT_MASK) ? -EPERM : 0;
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if (!ret) {
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reg &= ~I40E_QTX_ENA_FAST_QDIS_MASK;
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writeback = true;
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}
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break;
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default:
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ret = -EINVAL;
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break;
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}
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if (writeback) {
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wr32(hw, I40E_QTX_ENA(pf_queue_id), reg);
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i40e_flush(hw);
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}
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return ret;
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}
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/**
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* i40e_ctrl_vsi_rx_queue
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* @vf: pointer to the vf info
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* @vsi_idx: index of VSI in PF struct
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* @vsi_queue_id: vsi relative queue index
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* @ctrl: control flags
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*
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* enable/disable/enable check/disable check
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**/
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static int i40e_ctrl_vsi_rx_queue(struct i40e_vf *vf, u16 vsi_idx,
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u16 vsi_queue_id,
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enum i40e_queue_ctrl ctrl)
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{
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struct i40e_pf *pf = vf->pf;
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struct i40e_hw *hw = &pf->hw;
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bool writeback = false;
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u16 pf_queue_id;
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int ret = 0;
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u32 reg;
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pf_queue_id = i40e_vc_get_pf_queue_id(vf, vsi_idx, vsi_queue_id);
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reg = rd32(hw, I40E_QRX_ENA(pf_queue_id));
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switch (ctrl) {
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case I40E_QUEUE_CTRL_ENABLE:
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reg |= I40E_QRX_ENA_QENA_REQ_MASK;
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writeback = true;
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break;
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case I40E_QUEUE_CTRL_ENABLECHECK:
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ret = (reg & I40E_QRX_ENA_QENA_STAT_MASK) ? 0 : -EPERM;
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break;
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case I40E_QUEUE_CTRL_DISABLE:
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reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
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writeback = true;
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break;
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case I40E_QUEUE_CTRL_DISABLECHECK:
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ret = (reg & I40E_QRX_ENA_QENA_STAT_MASK) ? -EPERM : 0;
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break;
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case I40E_QUEUE_CTRL_FASTDISABLE:
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reg |= I40E_QRX_ENA_FAST_QDIS_MASK;
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writeback = true;
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break;
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case I40E_QUEUE_CTRL_FASTDISABLECHECK:
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ret = (reg & I40E_QRX_ENA_QENA_STAT_MASK) ? -EPERM : 0;
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if (!ret) {
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reg &= ~I40E_QRX_ENA_FAST_QDIS_MASK;
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writeback = true;
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}
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break;
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default:
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ret = -EINVAL;
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break;
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}
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if (writeback) {
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wr32(hw, I40E_QRX_ENA(pf_queue_id), reg);
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i40e_flush(hw);
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}
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return ret;
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}
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/**
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* i40e_config_irq_link_list
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* @vf: pointer to the vf info
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@ -1328,8 +1204,6 @@ static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
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struct i40e_pf *pf = vf->pf;
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u16 vsi_id = vqs->vsi_id;
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i40e_status aq_ret = 0;
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unsigned long tempmap;
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u16 queue_id;
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if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
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aq_ret = I40E_ERR_PARAM;
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@ -1345,52 +1219,8 @@ static int i40e_vc_enable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
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aq_ret = I40E_ERR_PARAM;
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goto error_param;
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}
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tempmap = vqs->rx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) {
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aq_ret = I40E_ERR_PARAM;
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goto error_param;
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}
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i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_ENABLE);
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}
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tempmap = vqs->tx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) {
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aq_ret = I40E_ERR_PARAM;
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goto error_param;
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}
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i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_ENABLE);
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}
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/* Poll the status register to make sure that the
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* requested op was completed successfully
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*/
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udelay(10);
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tempmap = vqs->rx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_ENABLECHECK)) {
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dev_err(&pf->pdev->dev,
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"Queue control check failed on RX queue %d of VSI %d VF %d\n",
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queue_id, vsi_id, vf->vf_id);
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}
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}
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tempmap = vqs->tx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_ENABLECHECK)) {
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dev_err(&pf->pdev->dev,
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"Queue control check failed on TX queue %d of VSI %d VF %d\n",
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queue_id, vsi_id, vf->vf_id);
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}
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}
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if (i40e_vsi_control_rings(pf->vsi[vsi_id], true))
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aq_ret = I40E_ERR_TIMEOUT;
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error_param:
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/* send the response to the vf */
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return i40e_vc_send_resp_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
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@ -1413,8 +1243,6 @@ static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
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struct i40e_pf *pf = vf->pf;
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u16 vsi_id = vqs->vsi_id;
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i40e_status aq_ret = 0;
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unsigned long tempmap;
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u16 queue_id;
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if (!test_bit(I40E_VF_STAT_ACTIVE, &vf->vf_states)) {
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aq_ret = I40E_ERR_PARAM;
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@ -1430,51 +1258,8 @@ static int i40e_vc_disable_queues_msg(struct i40e_vf *vf, u8 *msg, u16 msglen)
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aq_ret = I40E_ERR_PARAM;
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goto error_param;
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}
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tempmap = vqs->rx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) {
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aq_ret = I40E_ERR_PARAM;
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goto error_param;
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}
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i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_DISABLE);
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}
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tempmap = vqs->tx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (!i40e_vc_isvalid_queue_id(vf, vsi_id, queue_id)) {
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aq_ret = I40E_ERR_PARAM;
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goto error_param;
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}
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i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_DISABLE);
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}
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/* Poll the status register to make sure that the
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* requested op was completed successfully
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*/
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udelay(10);
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tempmap = vqs->rx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (i40e_ctrl_vsi_rx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_DISABLECHECK)) {
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dev_err(&pf->pdev->dev,
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"Queue control check failed on RX queue %d of VSI %d VF %d\n",
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queue_id, vsi_id, vf->vf_id);
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}
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}
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tempmap = vqs->tx_queues;
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for_each_set_bit(queue_id, &tempmap, I40E_MAX_VSI_QP) {
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if (i40e_ctrl_vsi_tx_queue(vf, vsi_id, queue_id,
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I40E_QUEUE_CTRL_DISABLECHECK)) {
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dev_err(&pf->pdev->dev,
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"Queue control check failed on TX queue %d of VSI %d VF %d\n",
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queue_id, vsi_id, vf->vf_id);
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}
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}
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if (i40e_vsi_control_rings(pf->vsi[vsi_id], false))
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aq_ret = I40E_ERR_TIMEOUT;
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error_param:
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/* send the response to the vf */
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