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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
net: dsa: mt7530: Extend device data ready for adding a new hardware
Add a structure holding required operations for each device such as device initialization, PHY port read or write, a checker whether PHY interface is supported on a certain port, MAC port setup for either bus pad or a specific PHY interface. The patch is done for ready adding a new hardware MT7531, and keep the same setup logic of existing hardware. Signed-off-by: Landen Chao <landen.chao@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Landen Chao
David S. Miller
parent
dc8ef938c9
commit
88bdef8be9
@ -372,8 +372,9 @@ mt7530_fdb_write(struct mt7530_priv *priv, u16 vid,
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mt7530_write(priv, MT7530_ATA1 + (i * 4), reg[i]);
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}
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/* Setup TX circuit including relevant PAD and driving */
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static int
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mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
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mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t interface)
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{
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struct mt7530_priv *priv = ds->priv;
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u32 ncpo1, ssc_delta, trgint, i, xtal;
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@ -387,7 +388,7 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
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return -EINVAL;
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}
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switch (mode) {
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switch (interface) {
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case PHY_INTERFACE_MODE_RGMII:
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trgint = 0;
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/* PLL frequency: 125MHz */
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@ -409,7 +410,8 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
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}
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break;
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default:
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dev_err(priv->dev, "xMII mode %d not supported\n", mode);
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dev_err(priv->dev, "xMII interface %d not supported\n",
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interface);
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return -EINVAL;
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}
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@ -1352,47 +1354,116 @@ mt7530_setup(struct dsa_switch *ds)
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return 0;
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}
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static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port,
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unsigned int mode,
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const struct phylink_link_state *state)
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static bool
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mt7530_phy_mode_supported(struct dsa_switch *ds, int port,
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const struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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switch (port) {
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case 0 ... 4: /* Internal phy */
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if (state->interface != PHY_INTERFACE_MODE_GMII)
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return false;
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break;
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case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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if (!phy_interface_mode_is_rgmii(state->interface) &&
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state->interface != PHY_INTERFACE_MODE_MII &&
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state->interface != PHY_INTERFACE_MODE_GMII)
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return false;
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break;
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case 6: /* 1st cpu port */
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if (state->interface != PHY_INTERFACE_MODE_RGMII &&
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state->interface != PHY_INTERFACE_MODE_TRGMII)
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return false;
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break;
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default:
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dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
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port);
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return false;
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}
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return true;
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}
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static bool
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mt753x_phy_mode_supported(struct dsa_switch *ds, int port,
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const struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->phy_mode_supported(ds, port, state);
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}
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static int
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mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->pad_setup(ds, state->interface);
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}
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static int
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mt7530_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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phy_interface_t interface)
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{
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struct mt7530_priv *priv = ds->priv;
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/* Only need to setup port5. */
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if (port != 5)
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return 0;
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mt7530_setup_port5(priv->ds, interface);
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return 0;
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}
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static int
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mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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const struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->mac_port_config(ds, port, mode, state->interface);
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}
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static void
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mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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const struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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u32 mcr_cur, mcr_new;
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if (!mt753x_phy_mode_supported(ds, port, state))
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goto unsupported;
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switch (port) {
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case 0: /* Internal phy */
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case 1:
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case 2:
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case 3:
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case 4:
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case 0 ... 4: /* Internal phy */
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if (state->interface != PHY_INTERFACE_MODE_GMII)
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return;
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goto unsupported;
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break;
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case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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if (priv->p5_interface == state->interface)
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break;
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if (!phy_interface_mode_is_rgmii(state->interface) &&
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state->interface != PHY_INTERFACE_MODE_MII &&
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state->interface != PHY_INTERFACE_MODE_GMII)
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return;
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mt7530_setup_port5(ds, state->interface);
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if (mt753x_mac_config(ds, port, mode, state) < 0)
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goto unsupported;
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break;
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case 6: /* 1st cpu port */
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if (priv->p6_interface == state->interface)
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break;
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if (state->interface != PHY_INTERFACE_MODE_RGMII &&
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state->interface != PHY_INTERFACE_MODE_TRGMII)
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return;
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mt753x_pad_setup(ds, state);
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/* Setup TX circuit incluing relevant PAD and driving */
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mt7530_pad_clk_setup(ds, state->interface);
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if (mt753x_mac_config(ds, port, mode, state) < 0)
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goto unsupported;
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priv->p6_interface = state->interface;
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break;
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default:
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dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
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unsupported:
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dev_err(ds->dev, "%s: unsupported %s port: %i\n",
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__func__, phy_modes(state->interface), port);
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return;
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}
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@ -1456,61 +1527,44 @@ static void mt7530_phylink_mac_link_up(struct dsa_switch *ds, int port,
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mt7530_set(priv, MT7530_PMCR_P(port), mcr);
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}
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static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
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unsigned long *supported,
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struct phylink_link_state *state)
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static void
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mt7530_mac_port_validate(struct dsa_switch *ds, int port,
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unsigned long *supported)
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{
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if (port == 5)
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phylink_set(supported, 1000baseX_Full);
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}
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static void
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mt753x_phylink_validate(struct dsa_switch *ds, int port,
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unsigned long *supported,
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struct phylink_link_state *state)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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struct mt7530_priv *priv = ds->priv;
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switch (port) {
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case 0: /* Internal phy */
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case 1:
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case 2:
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case 3:
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case 4:
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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state->interface != PHY_INTERFACE_MODE_GMII)
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goto unsupported;
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break;
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case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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!phy_interface_mode_is_rgmii(state->interface) &&
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state->interface != PHY_INTERFACE_MODE_MII &&
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state->interface != PHY_INTERFACE_MODE_GMII)
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goto unsupported;
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break;
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case 6: /* 1st cpu port */
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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state->interface != PHY_INTERFACE_MODE_RGMII &&
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state->interface != PHY_INTERFACE_MODE_TRGMII)
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goto unsupported;
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break;
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default:
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dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
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unsupported:
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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!mt753x_phy_mode_supported(ds, port, state)) {
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linkmode_zero(supported);
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return;
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}
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phylink_set_port_modes(mask);
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phylink_set(mask, Autoneg);
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if (state->interface == PHY_INTERFACE_MODE_TRGMII) {
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phylink_set(mask, 1000baseT_Full);
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} else {
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if (state->interface != PHY_INTERFACE_MODE_TRGMII) {
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phylink_set(mask, 10baseT_Half);
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Half);
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phylink_set(mask, 100baseT_Full);
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if (state->interface != PHY_INTERFACE_MODE_MII) {
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/* This switch only supports 1G full-duplex. */
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phylink_set(mask, 1000baseT_Full);
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if (port == 5)
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phylink_set(mask, 1000baseX_Full);
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}
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phylink_set(mask, Autoneg);
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}
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/* This switch only supports 1G full-duplex. */
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if (state->interface != PHY_INTERFACE_MODE_MII)
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phylink_set(mask, 1000baseT_Full);
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priv->info->mac_port_validate(ds, port, mask);
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phylink_set(mask, Pause);
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phylink_set(mask, Asym_Pause);
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@ -1558,12 +1612,45 @@ mt7530_phylink_mac_link_state(struct dsa_switch *ds, int port,
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return 1;
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}
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static int
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mt753x_phylink_mac_link_state(struct dsa_switch *ds, int port,
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struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->mac_port_get_state(ds, port, state);
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}
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static int
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mt753x_setup(struct dsa_switch *ds)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->sw_setup(ds);
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}
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static int
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mt753x_phy_read(struct dsa_switch *ds, int port, int regnum)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->phy_read(ds, port, regnum);
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}
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static int
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mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->phy_write(ds, port, regnum, val);
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}
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static const struct dsa_switch_ops mt7530_switch_ops = {
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.get_tag_protocol = mtk_get_tag_protocol,
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.setup = mt7530_setup,
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.setup = mt753x_setup,
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.get_strings = mt7530_get_strings,
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.phy_read = mt7530_phy_read,
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.phy_write = mt7530_phy_write,
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.phy_read = mt753x_phy_read,
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.phy_write = mt753x_phy_write,
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.get_ethtool_stats = mt7530_get_ethtool_stats,
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.get_sset_count = mt7530_get_sset_count,
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.port_enable = mt7530_port_enable,
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@ -1580,16 +1667,41 @@ static const struct dsa_switch_ops mt7530_switch_ops = {
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.port_vlan_del = mt7530_port_vlan_del,
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.port_mirror_add = mt7530_port_mirror_add,
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.port_mirror_del = mt7530_port_mirror_del,
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.phylink_validate = mt7530_phylink_validate,
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.phylink_mac_link_state = mt7530_phylink_mac_link_state,
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.phylink_mac_config = mt7530_phylink_mac_config,
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.phylink_validate = mt753x_phylink_validate,
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.phylink_mac_link_state = mt753x_phylink_mac_link_state,
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.phylink_mac_config = mt753x_phylink_mac_config,
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.phylink_mac_link_down = mt7530_phylink_mac_link_down,
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.phylink_mac_link_up = mt7530_phylink_mac_link_up,
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};
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static const struct mt753x_info mt753x_table[] = {
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[ID_MT7621] = {
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.id = ID_MT7621,
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.sw_setup = mt7530_setup,
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.phy_read = mt7530_phy_read,
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.phy_write = mt7530_phy_write,
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.pad_setup = mt7530_pad_clk_setup,
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.phy_mode_supported = mt7530_phy_mode_supported,
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.mac_port_validate = mt7530_mac_port_validate,
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.mac_port_get_state = mt7530_phylink_mac_link_state,
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.mac_port_config = mt7530_mac_config,
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},
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[ID_MT7530] = {
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.id = ID_MT7530,
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.sw_setup = mt7530_setup,
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.phy_read = mt7530_phy_read,
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.phy_write = mt7530_phy_write,
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.pad_setup = mt7530_pad_clk_setup,
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.phy_mode_supported = mt7530_phy_mode_supported,
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.mac_port_validate = mt7530_mac_port_validate,
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.mac_port_get_state = mt7530_phylink_mac_link_state,
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.mac_port_config = mt7530_mac_config,
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},
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};
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static const struct of_device_id mt7530_of_match[] = {
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{ .compatible = "mediatek,mt7621", .data = (void *)ID_MT7621, },
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{ .compatible = "mediatek,mt7530", .data = (void *)ID_MT7530, },
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{ .compatible = "mediatek,mt7621", .data = &mt753x_table[ID_MT7621], },
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{ .compatible = "mediatek,mt7530", .data = &mt753x_table[ID_MT7530], },
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{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, mt7530_of_match);
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@ -1630,8 +1742,21 @@ mt7530_probe(struct mdio_device *mdiodev)
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/* Get the hardware identifier from the devicetree node.
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* We will need it for some of the clock and regulator setup.
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*/
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priv->id = (unsigned int)(unsigned long)
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of_device_get_match_data(&mdiodev->dev);
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priv->info = of_device_get_match_data(&mdiodev->dev);
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if (!priv->info)
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return -EINVAL;
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/* Sanity check if these required device operations are filled
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* properly.
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*/
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if (!priv->info->sw_setup || !priv->info->pad_setup ||
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!priv->info->phy_read || !priv->info->phy_write ||
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!priv->info->phy_mode_supported ||
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!priv->info->mac_port_validate ||
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!priv->info->mac_port_get_state || !priv->info->mac_port_config)
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return -EINVAL;
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priv->id = priv->info->id;
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if (priv->id == ID_MT7530) {
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priv->core_pwr = devm_regulator_get(&mdiodev->dev, "core");
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@ -11,7 +11,7 @@
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#define MT7530_NUM_FDB_RECORDS 2048
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#define MT7530_ALL_MEMBERS 0xff
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enum {
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enum mt753x_id {
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ID_MT7530 = 0,
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ID_MT7621 = 1,
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};
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@ -443,6 +443,40 @@ static const char *p5_intf_modes(unsigned int p5_interface)
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}
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}
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/* struct mt753x_info - This is the main data structure for holding the specific
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* part for each supported device
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* @sw_setup: Holding the handler to a device initialization
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* @phy_read: Holding the way reading PHY port
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* @phy_write: Holding the way writing PHY port
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* @pad_setup: Holding the way setting up the bus pad for a certain
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* MAC port
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* @phy_mode_supported: Check if the PHY type is being supported on a certain
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* port
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* @mac_port_validate: Holding the way to set addition validate type for a
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* certan MAC port
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* @mac_port_get_state: Holding the way getting the MAC/PCS state for a certain
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* MAC port
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* @mac_port_config: Holding the way setting up the PHY attribute to a
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* certain MAC port
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*/
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struct mt753x_info {
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enum mt753x_id id;
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int (*sw_setup)(struct dsa_switch *ds);
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int (*phy_read)(struct dsa_switch *ds, int port, int regnum);
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int (*phy_write)(struct dsa_switch *ds, int port, int regnum, u16 val);
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int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface);
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bool (*phy_mode_supported)(struct dsa_switch *ds, int port,
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const struct phylink_link_state *state);
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void (*mac_port_validate)(struct dsa_switch *ds, int port,
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unsigned long *supported);
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int (*mac_port_get_state)(struct dsa_switch *ds, int port,
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struct phylink_link_state *state);
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int (*mac_port_config)(struct dsa_switch *ds, int port,
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unsigned int mode,
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phy_interface_t interface);
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};
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/* struct mt7530_priv - This is the main data structure for holding the state
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* of the driver
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* @dev: The device pointer
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@ -468,6 +502,7 @@ struct mt7530_priv {
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struct regulator *core_pwr;
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struct regulator *io_pwr;
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struct gpio_desc *reset;
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const struct mt753x_info *info;
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unsigned int id;
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bool mcm;
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phy_interface_t p6_interface;
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