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drm/i915/bdw: Export workaround data to debugfs
The workarounds that are applied are exported to a debugfs file; this is used to verify their state after the test case (reset or suspend/resume etc). This patch is only required to support i-g-t. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2628,6 +2628,45 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
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return 0;
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}
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static int intel_wa_registers(struct seq_file *m, void *unused)
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{
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int i;
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int ret;
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struct drm_info_node *node = (struct drm_info_node *) m->private;
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struct drm_device *dev = node->minor->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (!IS_BROADWELL(dev)) {
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DRM_DEBUG_DRIVER("Workaround table not available !!\n");
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return -EINVAL;
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}
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ret = mutex_lock_interruptible(&dev->struct_mutex);
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if (ret)
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return ret;
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intel_runtime_pm_get(dev_priv);
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seq_printf(m, "Workarounds applied: %d\n", dev_priv->num_wa_regs);
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for (i = 0; i < dev_priv->num_wa_regs; ++i) {
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u32 addr, mask;
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addr = dev_priv->intel_wa_regs[i].addr;
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mask = dev_priv->intel_wa_regs[i].mask;
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dev_priv->intel_wa_regs[i].value = I915_READ(addr) | mask;
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if (dev_priv->intel_wa_regs[i].addr)
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seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
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dev_priv->intel_wa_regs[i].addr,
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dev_priv->intel_wa_regs[i].value,
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dev_priv->intel_wa_regs[i].mask);
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}
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intel_runtime_pm_put(dev_priv);
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mutex_unlock(&dev->struct_mutex);
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return 0;
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}
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struct pipe_crc_info {
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const char *name;
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struct drm_device *dev;
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@ -4159,6 +4198,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
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{"i915_semaphore_status", i915_semaphore_status, 0},
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{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
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{"i915_dp_mst_info", i915_dp_mst_info, 0},
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{"intel_wa_registers", intel_wa_registers, 0}
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};
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#define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
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@ -1556,6 +1556,20 @@ struct drm_i915_private {
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struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
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int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
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/*
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* workarounds are currently applied at different places and
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* changes are being done to consolidate them so exact count is
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* not clear at this point, use a max value for now.
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*/
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#define I915_MAX_WA_REGS 16
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struct {
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u32 addr;
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u32 value;
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/* bitmask representing WA bits */
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u32 mask;
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} intel_wa_regs[I915_MAX_WA_REGS];
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u32 num_wa_regs;
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/* Reclocking support */
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bool render_reclock_avail;
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bool lvds_downclock_avail;
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@ -660,20 +660,40 @@ intel_init_pipe_control(struct intel_engine_cs *ring)
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static inline void intel_ring_emit_wa(struct intel_engine_cs *ring,
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u32 addr, u32 value)
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{
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struct drm_device *dev = ring->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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if (dev_priv->num_wa_regs > I915_MAX_WA_REGS)
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return;
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intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));
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intel_ring_emit(ring, addr);
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intel_ring_emit(ring, value);
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dev_priv->intel_wa_regs[dev_priv->num_wa_regs].addr = addr;
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dev_priv->intel_wa_regs[dev_priv->num_wa_regs].mask = (value) & 0xFFFF;
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/* value is updated with the status of remaining bits of this
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* register when it is read from debugfs file
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*/
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dev_priv->intel_wa_regs[dev_priv->num_wa_regs].value = value;
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dev_priv->num_wa_regs++;
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return;
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}
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static int gen8_init_workarounds(struct intel_engine_cs *ring)
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{
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int ret;
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struct drm_device *dev = ring->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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/*
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* workarounds applied in this fn are part of register state context,
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* they need to be re-initialized followed by gpu reset, suspend/resume,
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* module reload.
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*/
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dev_priv->num_wa_regs = 0;
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memset(dev_priv->intel_wa_regs, 0, sizeof(dev_priv->intel_wa_regs));
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/*
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* update the number of dwords required based on the
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@ -732,6 +752,9 @@ static int gen8_init_workarounds(struct intel_engine_cs *ring)
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intel_ring_advance(ring);
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DRM_DEBUG_DRIVER("Number of Workarounds applied: %d\n",
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dev_priv->num_wa_regs);
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return 0;
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}
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