mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-24 04:30:52 +07:00
dmaengine: ioat setting ioat timeout as module parameter
DMA transaction time to completion is a function of PCI bandwidth, transaction size and a queue depth. So hard coded value for timeouts might be wrong for some scenarios. Signed-off-by: Leonid Ravich <Leonid.Ravich@emc.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20200701184816.29138-1-leonid.ravich@dell.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
8678c71c17
commit
87730ccbdd
@ -26,6 +26,18 @@
|
||||
|
||||
#include "../dmaengine.h"
|
||||
|
||||
int completion_timeout = 200;
|
||||
module_param(completion_timeout, int, 0644);
|
||||
MODULE_PARM_DESC(completion_timeout,
|
||||
"set ioat completion timeout [msec] (default 200 [msec])");
|
||||
int idle_timeout = 2000;
|
||||
module_param(idle_timeout, int, 0644);
|
||||
MODULE_PARM_DESC(idle_timeout,
|
||||
"set ioat idel timeout [msec] (default 2000 [msec])");
|
||||
|
||||
#define IDLE_TIMEOUT msecs_to_jiffies(idle_timeout)
|
||||
#define COMPLETION_TIMEOUT msecs_to_jiffies(completion_timeout)
|
||||
|
||||
static char *chanerr_str[] = {
|
||||
"DMA Transfer Source Address Error",
|
||||
"DMA Transfer Destination Address Error",
|
||||
|
@ -104,8 +104,6 @@ struct ioatdma_chan {
|
||||
#define IOAT_RUN 5
|
||||
#define IOAT_CHAN_ACTIVE 6
|
||||
struct timer_list timer;
|
||||
#define COMPLETION_TIMEOUT msecs_to_jiffies(100)
|
||||
#define IDLE_TIMEOUT msecs_to_jiffies(2000)
|
||||
#define RESET_DELAY msecs_to_jiffies(100)
|
||||
struct ioatdma_device *ioat_dma;
|
||||
dma_addr_t completion_dma;
|
||||
|
Loading…
Reference in New Issue
Block a user