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synced 2024-11-25 01:00:58 +07:00
net/mlx5: Fix flow steering NIC capabilities check
Flow steering infrastructure is currently used only on link layer
ethernet, therefore the driver should initialize the flow steering
when the device link layer is ethernet.
In addition, add missing capability check before initializing the
namespace of NIC RX flow tables.
Fixes: 2530236303
('net/mlx5_core: Flow steering tree initialization')
Signed-off-by: Maor Gottlieb <maorg@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
2fee37a47c
commit
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@ -1767,6 +1767,9 @@ static void cleanup_root_ns(struct mlx5_core_dev *dev)
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void mlx5_cleanup_fs(struct mlx5_core_dev *dev)
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void mlx5_cleanup_fs(struct mlx5_core_dev *dev)
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{
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{
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if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
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return;
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cleanup_root_ns(dev);
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cleanup_root_ns(dev);
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cleanup_single_prio_root_ns(dev, dev->priv.fdb_root_ns);
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cleanup_single_prio_root_ns(dev, dev->priv.fdb_root_ns);
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cleanup_single_prio_root_ns(dev, dev->priv.esw_egress_root_ns);
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cleanup_single_prio_root_ns(dev, dev->priv.esw_egress_root_ns);
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@ -1828,15 +1831,20 @@ int mlx5_init_fs(struct mlx5_core_dev *dev)
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{
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{
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int err = 0;
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int err = 0;
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if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
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return 0;
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err = mlx5_init_fc_stats(dev);
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err = mlx5_init_fc_stats(dev);
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if (err)
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if (err)
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return err;
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return err;
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if (MLX5_CAP_GEN(dev, nic_flow_table)) {
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if (MLX5_CAP_GEN(dev, nic_flow_table) &&
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MLX5_CAP_FLOWTABLE_NIC_RX(dev, ft_support)) {
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err = init_root_ns(dev);
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err = init_root_ns(dev);
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if (err)
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if (err)
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goto err;
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goto err;
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}
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}
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if (MLX5_CAP_GEN(dev, eswitch_flow_table)) {
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if (MLX5_CAP_GEN(dev, eswitch_flow_table)) {
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err = init_fdb_root_ns(dev);
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err = init_fdb_root_ns(dev);
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if (err)
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if (err)
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@ -1367,6 +1367,12 @@ enum mlx5_cap_type {
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#define MLX5_CAP_FLOWTABLE_MAX(mdev, cap) \
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#define MLX5_CAP_FLOWTABLE_MAX(mdev, cap) \
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MLX5_GET(flow_table_nic_cap, mdev->hca_caps_max[MLX5_CAP_FLOW_TABLE], cap)
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MLX5_GET(flow_table_nic_cap, mdev->hca_caps_max[MLX5_CAP_FLOW_TABLE], cap)
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#define MLX5_CAP_FLOWTABLE_NIC_RX(mdev, cap) \
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MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_receive.cap)
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#define MLX5_CAP_FLOWTABLE_NIC_RX_MAX(mdev, cap) \
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MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_receive.cap)
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#define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \
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#define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \
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MLX5_GET(flow_table_eswitch_cap, \
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MLX5_GET(flow_table_eswitch_cap, \
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mdev->hca_caps_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)
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mdev->hca_caps_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)
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