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This pull request contains SoC changes for Broadcom ARM-based SoCs:
- Chris prepares support for the BCM23550 by removing reset code in the BCM21664 machine code since a proper drivers/power/reset driver is provided and shared, he then adds a machine entry point for BCM23550 and updates the SMP code to bring-up the secondary cores on BCM23550 - Ben fixes a warning in the Kona L2 SMC code by adding the missing include file -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXY1beAAoJEIfQlpxEBwcEFKYQAN0/ba6mCFmr8DLthDJkqeMt yrVeVRB1H6HYnt2cqaG/tbEeZZ+d+S4PhyRbHtAQ4cjgUq0qw8HNc/paN68K4pj0 JuY/52T2mL9WY9f96VBOAnmyRGC2YjTO3xC902BHOVBqQnYzHZm/ki9nxePo8F98 JTAsZuTR+NthfWuwFAAhI6xRws8d9jLXsirPPld6iuRo48/3UoxnHIzz+dQJghIy EVqXf3ckL09LYZqvY6dagcWQxR0RC80Z2hHska4uRirfmPjFKXYM6NvftKu3YaKz cRC0bE6t4WR7YX3LCLYWMers7rnElhfqpgvwJVvYnnwDTpc7469CF9ql2IJSM+Dj 8DDX9pHWwNZTaHglmigIW8inaOS3ChtOb+V5nZxAsaSh5h9W99JTbpnFjqgvBZ0x uHHwsiv6xWDDujeD5lF6+VcVekk1WGoJ8ALaa4MBxdasljw9SyRpb3q8PWXAcbk2 WMPBhED6OdfRuQ/Gf2466LcM1LBkd0nL5mYUZtN/py5B2xtvHgmee2H9AZQQlHhb DhmXpjG4gV5ySInJs30HrK1Z6iELa+hI3gouhsqCCo4Tj+EK7/yGRncUZ02tHjEk Tnmf3tepkX1paukYriVwLwRtuf3KkJJH5U+P4wRR/vREewbIy9iqaQFTg2IZUJr9 Mh4vZRnzjw0Qgjy0M4Dj =zoLK -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.8/soc' of http://github.com/Broadcom/stblinux into next/soc This pull request contains SoC changes for Broadcom ARM-based SoCs: - Chris prepares support for the BCM23550 by removing reset code in the BCM21664 machine code since a proper drivers/power/reset driver is provided and shared, he then adds a machine entry point for BCM23550 and updates the SMP code to bring-up the secondary cores on BCM23550 - Ben fixes a warning in the Kona L2 SMC code by adding the missing include file * tag 'arm-soc/for-4.8/soc' of http://github.com/Broadcom/stblinux: ARM: bcm: fix missing include of kona_l2_cache.h ARM: BCM23550 SMP support ARM: Add support for Broadcom BCM23550 SoC ARM: bcm21664: Remove reset code Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
8739a229b6
@ -111,9 +111,17 @@ config ARCH_BCM_21664
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Enable support for the BCM21664 family, which includes
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BCM21663 and BCM21664 variants.
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config ARCH_BCM_23550
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bool "Broadcom BCM23550 SoC"
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depends on ARCH_MULTI_V7
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select ARCH_BCM_MOBILE
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select HAVE_SMP
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help
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Enable support for the BCM23550.
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config ARCH_BCM_MOBILE_L2_CACHE
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bool "Broadcom mobile SoC level 2 cache support"
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depends on ARCH_BCM_MOBILE
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depends on ARCH_BCM_281XX || ARCH_BCM_21664
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default y
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select CACHE_L2X0
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select ARCH_BCM_MOBILE_SMC
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@ -128,7 +136,7 @@ config ARCH_BCM_MOBILE_SMP
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select HAVE_ARM_SCU
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select ARM_ERRATA_764369
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help
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SMP support for the BCM281XX and BCM21664 SoC families.
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SMP support for the BCM281XX, BCM21664 and BCM23550 SoC families.
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Provided as an option so SMP support for SoCs of this type
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can be disabled for an SMP-enabled kernel.
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@ -26,7 +26,10 @@ obj-$(CONFIG_ARCH_BCM_281XX) += board_bcm281xx.o
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# BCM21664
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obj-$(CONFIG_ARCH_BCM_21664) += board_bcm21664.o
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# BCM281XX and BCM21664 SMP support
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# BCM23550
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obj-$(CONFIG_ARCH_BCM_23550) += board_bcm23550.o
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# BCM281XX, BCM21664 and BCM23550 SMP support
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obj-$(CONFIG_ARCH_BCM_MOBILE_SMP) += platsmp.o
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# BCM281XX and BCM21664 L2 cache control
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@ -11,53 +11,12 @@
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* GNU General Public License for more details.
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*/
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include "kona_l2_cache.h"
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#define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr"
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#define RSTMGR_REG_WR_ACCESS_OFFSET 0
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#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
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#define RSTMGR_WR_PASSWORD 0xa5a5
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#define RSTMGR_WR_PASSWORD_SHIFT 8
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#define RSTMGR_WR_ACCESS_ENABLE 1
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static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
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{
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void __iomem *base;
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struct device_node *resetmgr;
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resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
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if (!resetmgr) {
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pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
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return;
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}
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base = of_iomap(resetmgr, 0);
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if (!base) {
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pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
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return;
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}
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/*
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* A soft reset is triggered by writing a 0 to bit 0 of the soft reset
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* register. To write to that register we must first write the password
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* and the enable bit in the write access enable register.
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*/
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writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
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RSTMGR_WR_ACCESS_ENABLE,
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base + RSTMGR_REG_WR_ACCESS_OFFSET);
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writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
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/* Wait for reset */
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while (1);
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}
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static void __init bcm21664_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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@ -71,6 +30,5 @@ static const char * const bcm21664_dt_compat[] = {
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DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
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.init_machine = bcm21664_init,
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.restart = bcm21664_restart,
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.dt_compat = bcm21664_dt_compat,
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MACHINE_END
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25
arch/arm/mach-bcm/board_bcm23550.c
Normal file
25
arch/arm/mach-bcm/board_bcm23550.c
Normal file
@ -0,0 +1,25 @@
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/*
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* Copyright (C) 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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static const char * const bcm23550_dt_compat[] = {
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"brcm,bcm23550",
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NULL,
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};
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DT_MACHINE_START(BCM23550_DT, "BCM23550 Broadcom Application Processor")
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.dt_compat = bcm23550_dt_compat,
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MACHINE_END
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@ -17,6 +17,7 @@
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#include <asm/hardware/cache-l2x0.h>
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#include "bcm_kona_smc.h"
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#include "kona_l2_cache.h"
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void __init kona_l2_cache_init(void)
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{
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@ -19,6 +19,7 @@
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#include <linux/io.h>
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#include <linux/jiffies.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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@ -255,6 +256,57 @@ static int kona_boot_secondary(unsigned int cpu, struct task_struct *idle)
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return -ENXIO;
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}
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/* Cluster Dormant Control command to bring CPU into a running state */
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#define CDC_CMD 6
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#define CDC_CMD_OFFSET 0
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#define CDC_CMD_REG(cpu) (CDC_CMD_OFFSET + 4*(cpu))
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/*
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* BCM23550 has a Cluster Dormant Control block that keeps the core in
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* idle state. A command needs to be sent to the block to bring the CPU
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* into running state.
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*/
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static int bcm23550_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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void __iomem *cdc_base;
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struct device_node *dn;
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char *name;
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int ret;
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/* Make sure a CDC node exists before booting the
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* secondary core.
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*/
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name = "brcm,bcm23550-cdc";
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dn = of_find_compatible_node(NULL, NULL, name);
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if (!dn) {
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pr_err("unable to find cdc node\n");
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return -ENODEV;
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}
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cdc_base = of_iomap(dn, 0);
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of_node_put(dn);
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if (!cdc_base) {
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pr_err("unable to remap cdc base register\n");
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return -ENOMEM;
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}
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/* Boot the secondary core */
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ret = kona_boot_secondary(cpu, idle);
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if (ret)
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goto out;
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/* Bring this CPU to RUN state so that nIRQ nFIQ
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* signals are unblocked.
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*/
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writel_relaxed(CDC_CMD, cdc_base + CDC_CMD_REG(cpu));
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out:
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iounmap(cdc_base);
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return ret;
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}
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static int nsp_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int ret;
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@ -283,6 +335,12 @@ static const struct smp_operations bcm_smp_ops __initconst = {
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CPU_METHOD_OF_DECLARE(bcm_smp_bcm281xx, "brcm,bcm11351-cpu-method",
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&bcm_smp_ops);
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static const struct smp_operations bcm23550_smp_ops __initconst = {
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.smp_boot_secondary = bcm23550_boot_secondary,
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};
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CPU_METHOD_OF_DECLARE(bcm_smp_bcm23550, "brcm,bcm23550",
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&bcm23550_smp_ops);
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static const struct smp_operations nsp_smp_ops __initconst = {
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.smp_prepare_cpus = bcm_smp_prepare_cpus,
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.smp_boot_secondary = nsp_boot_secondary,
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