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dt-bindings: display: display-timing: Add property to configure sync drive edge

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There are display panels which demands that the sync signal is driven on
different edge than the pixel data.
With the syncclk-active property we can specify the clk edge to be used to
drive the sync signal. When the property is missing it indicates that the
sync is driven on the same edge as the pixel data.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Peter Ujfalusi 2016-09-22 13:35:24 +03:00 committed by Tomi Valkeinen
parent bda63d5c70
commit 86f46565df
1 changed files with 8 additions and 0 deletions
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8
Documentation/devicetree/bindings/display/panel/display-timing.txt
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@ -32,6 +32,14 @@ optional properties:
- active low = drive pixel data on falling edge/
sample data on rising edge
- ignored = ignored
- syncclk-active: with
- active high = drive sync on rising edge/
sample sync on falling edge of pixel
clock
- active low = drive sync on falling edge/
sample sync on rising edge of pixel
clock
- omitted = same configuration as pixelclk-active
- interlaced (bool): boolean to enable interlaced mode
- doublescan (bool): boolean to enable doublescan mode
- doubleclk (bool): boolean to enable doubleclock mode