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@ -126,31 +126,35 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
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* R15 - kernel stack pointer
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*/
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.macro SAVE_ALL_BASE savearea
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stmg %r12,%r15,\savearea
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larl %r13,system_call
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.endm
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.macro SAVE_ALL_SVC psworg,savearea
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la %r12,\psworg
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stmg %r11,%r15,\savearea
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lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
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aghi %r15,-SP_SIZE # make room for registers & psw
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lg %r11,__LC_LAST_BREAK
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.endm
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.macro SAVE_ALL_SYNC psworg,savearea
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la %r12,\psworg
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.macro SAVE_ALL_PGM psworg,savearea
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stmg %r11,%r15,\savearea
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tm \psworg+1,0x01 # test problem state bit
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jz 2f # skip stack setup save
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lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
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#ifdef CONFIG_CHECK_STACK
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j 3f
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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jz stack_overflow
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3:
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jnz 1f
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tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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jnz 2f
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la %r12,\psworg
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j stack_overflow
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#else
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jz 2f
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#endif
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2:
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1: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
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2: aghi %r15,-SP_SIZE # make room for registers & psw
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larl %r13,system_call
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lg %r11,__LC_LAST_BREAK
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.endm
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.macro SAVE_ALL_ASYNC psworg,savearea
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stmg %r11,%r15,\savearea
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larl %r13,system_call
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lg %r11,__LC_LAST_BREAK
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la %r12,\psworg
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tm \psworg+1,0x01 # test problem state bit
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jnz 1f # from user -> load kernel stack
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@ -164,27 +168,23 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
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0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
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slgr %r14,%r15
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srag %r14,%r14,STACK_SHIFT
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jz 2f
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1: lg %r15,__LC_ASYNC_STACK # load async stack
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#ifdef CONFIG_CHECK_STACK
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j 3f
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2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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jz stack_overflow
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3:
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jnz 1f
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tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
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jnz 2f
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j stack_overflow
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#else
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jz 2f
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#endif
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2:
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1: lg %r15,__LC_ASYNC_STACK # load async stack
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2: aghi %r15,-SP_SIZE # make room for registers & psw
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.endm
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.macro CREATE_STACK_FRAME psworg,savearea
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aghi %r15,-SP_SIZE # make room for registers & psw
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mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
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.macro CREATE_STACK_FRAME savearea
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xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
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stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
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icm %r12,3,__LC_SVC_ILC
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stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
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st %r12,SP_SVCNR(%r15)
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mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
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la %r12,0
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stg %r12,__SF_BACKCHAIN(%r15)
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mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
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stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
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.endm
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.macro RESTORE_ALL psworg,sync
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@ -200,6 +200,13 @@ _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
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lpswe \psworg # back to caller
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.endm
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.macro LAST_BREAK
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srag %r10,%r11,23
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jz 0f
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stg %r11,__TI_last_break(%r12)
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0:
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.endm
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/*
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* Scheduler resume function, called by switch_to
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* gpr2 = (task_struct *) prev
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@ -245,37 +252,38 @@ __critical_start:
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system_call:
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stpt __LC_SYNC_ENTER_TIMER
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sysc_saveall:
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SAVE_ALL_BASE __LC_SAVE_AREA
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SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
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CREATE_STACK_FRAME __LC_SAVE_AREA
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mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
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mvc SP_ILC(4,%r15),__LC_SVC_ILC
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stg %r7,SP_ARGS(%r15)
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lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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sysc_vtime:
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UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
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sysc_stime:
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UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
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sysc_update:
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mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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LAST_BREAK
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sysc_do_svc:
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lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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ltgr %r7,%r7 # test for svc 0
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llgh %r7,SP_SVCNR(%r15)
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slag %r7,%r7,2 # shift and test for svc 0
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jnz sysc_nr_ok
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# svc 0: system call number in %r1
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cl %r1,BASED(.Lnr_syscalls)
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llgfr %r1,%r1 # clear high word in r1
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cghi %r1,NR_syscalls
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jnl sysc_nr_ok
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lgfr %r7,%r1 # clear high word in r1
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sth %r1,SP_SVCNR(%r15)
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slag %r7,%r1,2 # shift and test for svc 0
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sysc_nr_ok:
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mvc SP_ARGS(8,%r15),SP_R7(%r15)
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sysc_do_restart:
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sth %r7,SP_SVCNR(%r15)
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sllg %r7,%r7,2 # svc number * 4
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larl %r10,sys_call_table
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#ifdef CONFIG_COMPAT
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tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
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tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ?
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jno sysc_noemu
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larl %r10,sys_call_table_emu # use 31 bit emulation system calls
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sysc_noemu:
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#endif
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tm __TI_flags+6(%r9),_TIF_SYSCALL
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tm __TI_flags+6(%r12),_TIF_SYSCALL
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lgf %r8,0(%r7,%r10) # load address of system call routine
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jnz sysc_tracesys
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basr %r14,%r8 # call sys_xxxx
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@ -284,7 +292,7 @@ sysc_noemu:
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sysc_return:
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LOCKDEP_SYS_EXIT
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sysc_tif:
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tm __TI_flags+7(%r9),_TIF_WORK_SVC
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tm __TI_flags+7(%r12),_TIF_WORK_SVC
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jnz sysc_work # there is work to do (signals etc.)
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sysc_restore:
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RESTORE_ALL __LC_RETURN_PSW,1
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@ -301,17 +309,17 @@ sysc_work:
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# One of the work bits is on. Find out which one.
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#
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sysc_work_tif:
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tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
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tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
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jo sysc_mcck_pending
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tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
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tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
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jo sysc_reschedule
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tm __TI_flags+7(%r9),_TIF_SIGPENDING
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tm __TI_flags+7(%r12),_TIF_SIGPENDING
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jo sysc_sigpending
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tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
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tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
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jo sysc_notify_resume
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tm __TI_flags+7(%r9),_TIF_RESTART_SVC
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tm __TI_flags+7(%r12),_TIF_RESTART_SVC
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jo sysc_restart
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tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
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tm __TI_flags+7(%r12),_TIF_SINGLE_STEP
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jo sysc_singlestep
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j sysc_return # beware of critical section cleanup
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@ -333,12 +341,12 @@ sysc_mcck_pending:
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# _TIF_SIGPENDING is set, call do_signal
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#
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sysc_sigpending:
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ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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la %r2,SP_PTREGS(%r15) # load pt_regs
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brasl %r14,do_signal # call do_signal
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tm __TI_flags+7(%r9),_TIF_RESTART_SVC
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tm __TI_flags+7(%r12),_TIF_RESTART_SVC
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jo sysc_restart
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tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
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tm __TI_flags+7(%r12),_TIF_SINGLE_STEP
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jo sysc_singlestep
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j sysc_return
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@ -354,17 +362,19 @@ sysc_notify_resume:
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# _TIF_RESTART_SVC is set, set up registers and restart svc
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#
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sysc_restart:
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ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
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ni __TI_flags+7(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
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lg %r7,SP_R2(%r15) # load new svc number
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mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
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lmg %r2,%r6,SP_R2(%r15) # load svc arguments
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j sysc_do_restart # restart svc
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sth %r7,SP_SVCNR(%r15)
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slag %r7,%r7,2
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j sysc_nr_ok # restart svc
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#
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# _TIF_SINGLE_STEP is set, call do_single_step
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#
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sysc_singlestep:
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ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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ni __TI_flags+7(%r12),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
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xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
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la %r2,SP_PTREGS(%r15) # address of register-save area
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larl %r14,sysc_return # load adr. of system return
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@ -377,8 +387,8 @@ sysc_singlestep:
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sysc_tracesys:
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la %r2,SP_PTREGS(%r15) # load pt_regs
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la %r3,0
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srl %r7,2
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stg %r7,SP_R2(%r15)
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llgh %r0,SP_SVCNR(%r15)
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stg %r0,SP_R2(%r15)
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brasl %r14,do_syscall_trace_enter
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lghi %r0,NR_syscalls
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clgr %r0,%r2
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@ -391,7 +401,7 @@ sysc_tracego:
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basr %r14,%r8 # call sys_xxx
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stg %r2,SP_R2(%r15) # store return value
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sysc_tracenogo:
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tm __TI_flags+6(%r9),_TIF_SYSCALL
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tm __TI_flags+6(%r12),_TIF_SYSCALL
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jz sysc_return
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la %r2,SP_PTREGS(%r15) # load pt_regs
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larl %r14,sysc_return # return point is sysc_return
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@ -403,7 +413,7 @@ sysc_tracenogo:
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.globl ret_from_fork
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ret_from_fork:
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lg %r13,__LC_SVC_NEW_PSW+8
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lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
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jo 0f
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stg %r15,SP_R15(%r15) # store stack pointer for new kthread
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@ -437,8 +447,8 @@ kernel_execve:
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lg %r15,__LC_KERNEL_STACK # load ksp
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aghi %r15,-SP_SIZE # make room for registers & psw
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lg %r13,__LC_SVC_NEW_PSW+8
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lg %r9,__LC_THREAD_INFO
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mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
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lg %r12,__LC_THREAD_INFO
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xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
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# TRACE_IRQS_ON
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stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
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@ -465,21 +475,23 @@ pgm_check_handler:
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* for LPSW?).
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*/
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stpt __LC_SYNC_ENTER_TIMER
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SAVE_ALL_BASE __LC_SAVE_AREA
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tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
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jnz pgm_per # got per exception -> special case
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|
|
|
|
SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
|
|
|
|
|
CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
|
|
|
|
|
SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
|
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|
|
CREATE_STACK_FRAME __LC_SAVE_AREA
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|
|
|
|
xc SP_ILC(4,%r15),SP_ILC(%r15)
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|
|
|
|
mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
|
|
|
|
|
lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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|
|
|
|
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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|
|
|
|
jz pgm_no_vtime
|
|
|
|
|
UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
|
|
|
|
|
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
|
|
|
|
mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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|
|
|
|
LAST_BREAK
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|
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|
pgm_no_vtime:
|
|
|
|
|
HANDLE_SIE_INTERCEPT
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|
|
|
TRACE_IRQS_CHECK_OFF
|
|
|
|
|
lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
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|
|
|
|
mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
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|
|
|
stg %r11,SP_ARGS(%r15)
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|
|
lgf %r3,__LC_PGM_ILC # load program interruption code
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|
|
|
|
lghi %r8,0x7f
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|
|
|
ngr %r8,%r3
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|
|
@ -503,31 +515,32 @@ pgm_per:
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|
|
clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
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|
je pgm_svcper
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|
# no interesting special case, ignore PER event
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|
|
lmg %r12,%r15,__LC_SAVE_AREA
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lpswe __LC_PGM_OLD_PSW
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|
#
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# Normal per exception
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#
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pgm_per_std:
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|
SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
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|
|
CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
|
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|
|
|
SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
|
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|
|
CREATE_STACK_FRAME __LC_SAVE_AREA
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|
|
mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
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|
lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
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|
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
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|
|
|
|
jz pgm_no_vtime2
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|
|
|
|
UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
|
|
|
|
|
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
|
|
|
|
mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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|
|
|
LAST_BREAK
|
|
|
|
|
pgm_no_vtime2:
|
|
|
|
|
HANDLE_SIE_INTERCEPT
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|
|
TRACE_IRQS_CHECK_OFF
|
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|
|
|
lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
lg %r1,__TI_task(%r9)
|
|
|
|
|
lg %r1,__TI_task(%r12)
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|
|
|
|
tm SP_PSW+1(%r15),0x01 # kernel per event ?
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|
|
|
|
jz kernel_per
|
|
|
|
|
mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
|
|
|
|
|
mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
|
|
|
|
|
mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
|
|
|
|
|
oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
|
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|
|
|
oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
|
|
|
|
|
lgf %r3,__LC_PGM_ILC # load program interruption code
|
|
|
|
|
lghi %r8,0x7f
|
|
|
|
|
ngr %r8,%r3 # clear per-event-bit and ilc
|
|
|
|
@ -538,19 +551,21 @@ pgm_no_vtime2:
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|
|
|
# it was a single stepped SVC that is causing all the trouble
|
|
|
|
|
#
|
|
|
|
|
pgm_svcper:
|
|
|
|
|
SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
|
|
|
|
CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
|
|
|
|
SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
|
|
|
|
|
CREATE_STACK_FRAME __LC_SAVE_AREA
|
|
|
|
|
mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
|
|
|
|
|
mvc SP_ILC(4,%r15),__LC_SVC_ILC
|
|
|
|
|
lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
|
|
|
|
|
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
|
|
|
|
mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
|
|
|
|
|
llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
|
|
|
|
|
lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
LAST_BREAK
|
|
|
|
|
TRACE_IRQS_OFF
|
|
|
|
|
lg %r8,__TI_task(%r9)
|
|
|
|
|
lg %r8,__TI_task(%r12)
|
|
|
|
|
mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
|
|
|
|
|
mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
|
|
|
|
|
mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
|
|
|
|
|
oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
|
|
|
|
|
oi __TI_flags+7(%r12),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
|
|
|
|
|
TRACE_IRQS_ON
|
|
|
|
|
stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
|
|
|
|
|
lmg %r2,%r6,SP_R2(%r15) # load svc arguments
|
|
|
|
@ -572,16 +587,17 @@ kernel_per:
|
|
|
|
|
io_int_handler:
|
|
|
|
|
stck __LC_INT_CLOCK
|
|
|
|
|
stpt __LC_ASYNC_ENTER_TIMER
|
|
|
|
|
SAVE_ALL_BASE __LC_SAVE_AREA+32
|
|
|
|
|
SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
|
|
|
|
|
CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
|
|
|
|
|
SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40
|
|
|
|
|
CREATE_STACK_FRAME __LC_SAVE_AREA+40
|
|
|
|
|
mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
|
|
|
|
|
lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
|
|
|
|
jz io_no_vtime
|
|
|
|
|
UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
|
|
|
|
|
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
|
|
|
|
mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
|
|
|
|
|
LAST_BREAK
|
|
|
|
|
io_no_vtime:
|
|
|
|
|
lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
HANDLE_SIE_INTERCEPT
|
|
|
|
|
TRACE_IRQS_OFF
|
|
|
|
|
la %r2,SP_PTREGS(%r15) # address of register-save area
|
|
|
|
@ -590,7 +606,7 @@ io_return:
|
|
|
|
|
LOCKDEP_SYS_EXIT
|
|
|
|
|
TRACE_IRQS_ON
|
|
|
|
|
io_tif:
|
|
|
|
|
tm __TI_flags+7(%r9),_TIF_WORK_INT
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_WORK_INT
|
|
|
|
|
jnz io_work # there is work to do (signals etc.)
|
|
|
|
|
io_restore:
|
|
|
|
|
RESTORE_ALL __LC_RETURN_PSW,0
|
|
|
|
@ -610,7 +626,7 @@ io_work:
|
|
|
|
|
jo io_work_user # yes -> do resched & signal
|
|
|
|
|
#ifdef CONFIG_PREEMPT
|
|
|
|
|
# check for preemptive scheduling
|
|
|
|
|
icm %r0,15,__TI_precount(%r9)
|
|
|
|
|
icm %r0,15,__TI_precount(%r12)
|
|
|
|
|
jnz io_restore # preemption is disabled
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
|
|
|
|
|
jno io_restore
|
|
|
|
@ -645,13 +661,13 @@ io_work_user:
|
|
|
|
|
# and _TIF_MCCK_PENDING
|
|
|
|
|
#
|
|
|
|
|
io_work_tif:
|
|
|
|
|
tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
|
|
|
|
|
jo io_mcck_pending
|
|
|
|
|
tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
|
|
|
|
|
jo io_reschedule
|
|
|
|
|
tm __TI_flags+7(%r9),_TIF_SIGPENDING
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_SIGPENDING
|
|
|
|
|
jo io_sigpending
|
|
|
|
|
tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
|
|
|
|
|
jo io_notify_resume
|
|
|
|
|
j io_return # beware of critical section cleanup
|
|
|
|
|
|
|
|
|
@ -706,16 +722,17 @@ io_notify_resume:
|
|
|
|
|
ext_int_handler:
|
|
|
|
|
stck __LC_INT_CLOCK
|
|
|
|
|
stpt __LC_ASYNC_ENTER_TIMER
|
|
|
|
|
SAVE_ALL_BASE __LC_SAVE_AREA+32
|
|
|
|
|
SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
|
|
|
|
|
CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
|
|
|
|
|
SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40
|
|
|
|
|
CREATE_STACK_FRAME __LC_SAVE_AREA+40
|
|
|
|
|
mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
|
|
|
|
|
lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
|
|
|
|
jz ext_no_vtime
|
|
|
|
|
UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
|
|
|
|
|
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
|
|
|
|
mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
|
|
|
|
|
LAST_BREAK
|
|
|
|
|
ext_no_vtime:
|
|
|
|
|
lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
HANDLE_SIE_INTERCEPT
|
|
|
|
|
TRACE_IRQS_OFF
|
|
|
|
|
la %r2,SP_PTREGS(%r15) # address of register-save area
|
|
|
|
@ -734,7 +751,9 @@ mcck_int_handler:
|
|
|
|
|
la %r1,4095 # revalidate r1
|
|
|
|
|
spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
|
|
|
|
|
lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
|
|
|
|
|
SAVE_ALL_BASE __LC_SAVE_AREA+64
|
|
|
|
|
stmg %r11,%r15,__LC_SAVE_AREA+80
|
|
|
|
|
larl %r13,system_call
|
|
|
|
|
lg %r11,__LC_LAST_BREAK
|
|
|
|
|
la %r12,__LC_MCK_OLD_PSW
|
|
|
|
|
tm __LC_MCCK_CODE,0x80 # system damage?
|
|
|
|
|
jo mcck_int_main # yes -> rest of mcck code invalid
|
|
|
|
@ -769,7 +788,10 @@ mcck_int_main:
|
|
|
|
|
srag %r14,%r14,PAGE_SHIFT
|
|
|
|
|
jz 0f
|
|
|
|
|
lg %r15,__LC_PANIC_STACK # load panic stack
|
|
|
|
|
0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
|
|
|
|
|
0: aghi %r15,-SP_SIZE # make room for registers & psw
|
|
|
|
|
CREATE_STACK_FRAME __LC_SAVE_AREA+80
|
|
|
|
|
mvc SP_PSW(16,%r15),0(%r12)
|
|
|
|
|
lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
|
|
|
|
|
jno mcck_no_vtime # no -> no timer update
|
|
|
|
|
tm SP_PSW+1(%r15),0x01 # interrupting from user ?
|
|
|
|
@ -777,8 +799,8 @@ mcck_int_main:
|
|
|
|
|
UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
|
|
|
|
|
UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
|
|
|
|
|
mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
|
|
|
|
|
LAST_BREAK
|
|
|
|
|
mcck_no_vtime:
|
|
|
|
|
lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
|
|
|
|
|
la %r2,SP_PTREGS(%r15) # load pt_regs
|
|
|
|
|
brasl %r14,s390_do_machine_check
|
|
|
|
|
tm SP_PSW+1(%r15),0x01 # returning to user ?
|
|
|
|
@ -789,7 +811,7 @@ mcck_no_vtime:
|
|
|
|
|
xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
|
|
|
|
|
lgr %r15,%r1
|
|
|
|
|
stosm __SF_EMPTY(%r15),0x04 # turn dat on
|
|
|
|
|
tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
|
|
|
|
|
tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
|
|
|
|
|
jno mcck_return
|
|
|
|
|
HANDLE_SIE_INTERCEPT
|
|
|
|
|
TRACE_IRQS_OFF
|
|
|
|
@ -803,6 +825,7 @@ mcck_return:
|
|
|
|
|
jno 0f
|
|
|
|
|
stpt __LC_EXIT_TIMER
|
|
|
|
|
0: lpswe __LC_RETURN_MCCK_PSW # back to caller
|
|
|
|
|
mcck_done:
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Restart interruption handler, kick starter for additional CPUs
|
|
|
|
@ -858,14 +881,14 @@ stack_overflow:
|
|
|
|
|
lg %r15,__LC_PANIC_STACK # change to panic stack
|
|
|
|
|
aghi %r15,-SP_SIZE
|
|
|
|
|
mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
|
|
|
|
|
stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
|
|
|
|
|
stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
|
|
|
|
|
la %r1,__LC_SAVE_AREA
|
|
|
|
|
chi %r12,__LC_SVC_OLD_PSW
|
|
|
|
|
je 0f
|
|
|
|
|
chi %r12,__LC_PGM_OLD_PSW
|
|
|
|
|
je 0f
|
|
|
|
|
la %r1,__LC_SAVE_AREA+32
|
|
|
|
|
0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
|
|
|
|
|
la %r1,__LC_SAVE_AREA+40
|
|
|
|
|
0: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
|
|
|
|
|
mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
|
|
|
|
|
xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
|
|
|
|
|
la %r2,SP_PTREGS(%r15) # load pt_regs
|
|
|
|
@ -920,21 +943,23 @@ cleanup_system_call:
|
|
|
|
|
je 0f
|
|
|
|
|
mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
|
|
|
|
|
0: cghi %r12,__LC_MCK_OLD_PSW
|
|
|
|
|
la %r12,__LC_SAVE_AREA+64
|
|
|
|
|
la %r12,__LC_SAVE_AREA+80
|
|
|
|
|
je 0f
|
|
|
|
|
la %r12,__LC_SAVE_AREA+32
|
|
|
|
|
la %r12,__LC_SAVE_AREA+40
|
|
|
|
|
0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
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jhe cleanup_vtime
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clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
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jh 0f
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mvc __LC_SAVE_AREA(32),0(%r12)
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0: stg %r13,8(%r12)
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stg %r12,__LC_SAVE_AREA+96 # argh
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SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
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lg %r12,__LC_SAVE_AREA+96 # argh
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stg %r15,24(%r12)
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llgh %r7,__LC_SVC_INT_CODE
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mvc __LC_SAVE_AREA(40),0(%r12)
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0: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
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aghi %r15,-SP_SIZE # make room for registers & psw
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stg %r15,32(%r12)
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stg %r11,0(%r12)
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CREATE_STACK_FRAME __LC_SAVE_AREA
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mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
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mvc SP_ILC(4,%r15),__LC_SVC_ILC
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stg %r7,SP_ARGS(%r15)
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mvc 8(8,%r12),__LC_THREAD_INFO
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cleanup_vtime:
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clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
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jhe cleanup_stime
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@ -945,7 +970,11 @@ cleanup_stime:
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UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
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cleanup_update:
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mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
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mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
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srag %r12,%r11,23
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lg %r12,__LC_THREAD_INFO
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jz 0f
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stg %r11,__TI_last_break(%r12)
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0: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
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la %r12,__LC_RETURN_PSW
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br %r14
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cleanup_system_call_insn:
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|
@ -972,11 +1001,11 @@ cleanup_sysc_restore:
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mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
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0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
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cghi %r12,__LC_MCK_OLD_PSW
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la %r12,__LC_SAVE_AREA+64
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|
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la %r12,__LC_SAVE_AREA+80
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|
|
je 1f
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la %r12,__LC_SAVE_AREA+32
|
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|
|
1: mvc 0(32,%r12),SP_R12(%r15)
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|
|
lmg %r0,%r11,SP_R0(%r15)
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|
|
la %r12,__LC_SAVE_AREA+40
|
|
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|
|
1: mvc 0(40,%r12),SP_R11(%r15)
|
|
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|
|
lmg %r0,%r10,SP_R0(%r15)
|
|
|
|
|
lg %r15,SP_R15(%r15)
|
|
|
|
|
2: la %r12,__LC_RETURN_PSW
|
|
|
|
|
br %r14
|
|
|
|
@ -997,8 +1026,8 @@ cleanup_io_restore:
|
|
|
|
|
jhe 0f
|
|
|
|
|
mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
|
|
|
|
|
0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
|
|
|
|
|
mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
|
|
|
|
|
lmg %r0,%r11,SP_R0(%r15)
|
|
|
|
|
mvc __LC_SAVE_AREA+80(40),SP_R11(%r15)
|
|
|
|
|
lmg %r0,%r10,SP_R0(%r15)
|
|
|
|
|
lg %r15,SP_R15(%r15)
|
|
|
|
|
1: la %r12,__LC_RETURN_PSW
|
|
|
|
|
br %r14
|
|
|
|
@ -1010,13 +1039,6 @@ cleanup_io_restore_insn:
|
|
|
|
|
* Integer constants
|
|
|
|
|
*/
|
|
|
|
|
.align 4
|
|
|
|
|
.Lconst:
|
|
|
|
|
.Lnr_syscalls: .long NR_syscalls
|
|
|
|
|
.L0x0130: .short 0x130
|
|
|
|
|
.L0x0140: .short 0x140
|
|
|
|
|
.L0x0150: .short 0x150
|
|
|
|
|
.L0x0160: .short 0x160
|
|
|
|
|
.L0x0170: .short 0x170
|
|
|
|
|
.Lcritical_start:
|
|
|
|
|
.quad __critical_start
|
|
|
|
|
.Lcritical_end:
|
|
|
|
|