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drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment
Easier to read if all the alignment changes are in one place and contained within a function. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191221120543.22816-3-imre.deak@intel.com
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@ -2590,7 +2590,22 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
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else
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return 64;
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} else {
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return intel_tile_width_bytes(fb, color_plane);
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u32 tile_width = intel_tile_width_bytes(fb, color_plane);
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/*
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* Display WA #0531: skl,bxt,kbl,glk
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*
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* Render decompression and plane width > 3840
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* combined with horizontal panning requires the
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* plane stride to be a multiple of 4. We'll just
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* require the entire fb to accommodate that to avoid
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* potential runtime errors at plane configuration time.
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*/
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if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) &&
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color_plane == 0 && fb->width > 3840)
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tile_width *= 4;
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return tile_width;
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}
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}
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@ -16346,20 +16361,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
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}
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stride_alignment = intel_fb_stride_alignment(fb, i);
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/*
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* Display WA #0531: skl,bxt,kbl,glk
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*
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* Render decompression and plane width > 3840
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* combined with horizontal panning requires the
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* plane stride to be a multiple of 4. We'll just
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* require the entire fb to accommodate that to avoid
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* potential runtime errors at plane configuration time.
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*/
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if (IS_GEN(dev_priv, 9) && i == 0 && fb->width > 3840 &&
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is_ccs_modifier(fb->modifier))
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stride_alignment *= 4;
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if (fb->pitches[i] & (stride_alignment - 1)) {
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DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n",
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i, fb->pitches[i], stride_alignment);
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