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powerpc/85xx: add e500 HID1 bit definition

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Also make 74xx HID1 definition conditional.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
Cc: Alexandre Bounine <alexandre.bounine@idt.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Li Yang 2010-11-03 17:35:31 +08:00 committed by Kumar Gala
parent 0c21e3aaf6
commit 86985db66e
2 changed files with 16 additions and 0 deletions
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2
arch/powerpc/include/asm/reg.h
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@ -283,6 +283,7 @@
#define HID0_NOPTI (1<<0) /* No-op dcbt and dcbst instr. */
#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */
#ifdef CONFIG_6xx
#define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */
#define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */
#define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */
@ -292,6 +293,7 @@
#define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */
#define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */
#define HID1_PS (1<<16) /* 750FX PLL selection */
#endif
#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */
#define SPRN_HID2_GEKKO 0x398 /* Gekko HID2 Register */
#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */

14
arch/powerpc/include/asm/reg_booke.h
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@ -246,6 +246,20 @@
store or cache line push */
#endif
/* Bit definitions for the HID1 */
#ifdef CONFIG_E500
/* e500v1/v2 */
#define HID1_PLL_CFG_MASK 0xfc000000 /* PLL_CFG input pins */
#define HID1_RFXE 0x00020000 /* Read fault exception enable */
#define HID1_R1DPE 0x00008000 /* R1 data bus parity enable */
#define HID1_R2DPE 0x00004000 /* R2 data bus parity enable */
#define HID1_ASTME 0x00002000 /* Address bus streaming mode enable */
#define HID1_ABE 0x00001000 /* Address broadcast enable */
#define HID1_MPXTT 0x00000400 /* MPX re-map transfer type */
#define HID1_ATS 0x00000080 /* Atomic status */
#define HID1_MID_MASK 0x0000000f /* MID input pins */
#endif
/* Bit definitions for the DBSR. */
/*
* DBSR bits which have conflicting definitions on true Book E versus IBM 40x.