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xhci: don't rely on precalculated value of needed trbs in the enqueue loop
Queue trbs until all payload data in the urb is tranferred. The actual number of trbs might need to change from the pre-calculated number when the packet alignment restrictions for td fragments in xhci 4.11.7.1 are taken into account. Long term plan is to get rid of calculating the needed trbs in advance all together. It's an unnecessary extra walk through the scatterlist. This change also allows some bulk queue function simplifications Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -3127,9 +3127,10 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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struct scatterlist *sg = NULL;
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bool more_trbs_coming = true;
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bool need_zero_pkt = false;
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unsigned int num_trbs, last_trb_num, i;
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bool first_trb = true;
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unsigned int num_trbs;
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unsigned int start_cycle, num_sgs = 0;
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unsigned int running_total, block_len, trb_buff_len, full_len;
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unsigned int enqd_len, block_len, trb_buff_len, full_len;
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int ret;
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u32 field, length_field, remainder;
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u64 addr;
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@ -3138,14 +3139,19 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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if (!ring)
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return -EINVAL;
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full_len = urb->transfer_buffer_length;
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/* If we have scatter/gather list, we use it. */
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if (urb->num_sgs) {
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num_sgs = urb->num_mapped_sgs;
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sg = urb->sg;
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addr = (u64) sg_dma_address(sg);
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block_len = sg_dma_len(sg);
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num_trbs = count_sg_trbs_needed(urb);
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} else
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} else {
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num_trbs = count_trbs_needed(urb);
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addr = (u64) urb->transfer_dma;
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block_len = full_len;
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}
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ret = prepare_transfer(xhci, xhci->devs[slot_id],
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ep_index, urb->stream_id,
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num_trbs, urb, 0, mem_flags);
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@ -3154,8 +3160,6 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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urb_priv = urb->hcpriv;
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last_trb_num = num_trbs - 1;
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/* Deal with URB_ZERO_PACKET - need one more td/trb */
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if (urb->transfer_flags & URB_ZERO_PACKET && urb_priv->length > 1)
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need_zero_pkt = true;
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@ -3170,40 +3174,20 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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start_trb = &ring->enqueue->generic;
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start_cycle = ring->cycle_state;
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full_len = urb->transfer_buffer_length;
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running_total = 0;
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block_len = 0;
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/* Queue the TRBs, even if they are zero-length */
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for (i = 0; i < num_trbs; i++) {
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for (enqd_len = 0; enqd_len < full_len; enqd_len += trb_buff_len) {
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field = TRB_TYPE(TRB_NORMAL);
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if (block_len == 0) {
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/* A new contiguous block. */
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if (sg) {
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addr = (u64) sg_dma_address(sg);
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block_len = sg_dma_len(sg);
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} else {
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addr = (u64) urb->transfer_dma;
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block_len = full_len;
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}
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/* TRB buffer should not cross 64KB boundaries */
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trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
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trb_buff_len = min_t(unsigned int,
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trb_buff_len,
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block_len);
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} else {
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/* Further through the contiguous block. */
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trb_buff_len = block_len;
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if (trb_buff_len > TRB_MAX_BUFF_SIZE)
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trb_buff_len = TRB_MAX_BUFF_SIZE;
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}
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/* TRB buffer should not cross 64KB boundaries */
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trb_buff_len = TRB_BUFF_LEN_UP_TO_BOUNDARY(addr);
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trb_buff_len = min_t(unsigned int, trb_buff_len, block_len);
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if (running_total + trb_buff_len > full_len)
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trb_buff_len = full_len - running_total;
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if (enqd_len + trb_buff_len > full_len)
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trb_buff_len = full_len - enqd_len;
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/* Don't change the cycle bit of the first TRB until later */
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if (i == 0) {
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if (first_trb) {
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first_trb = false;
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if (start_cycle == 0)
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field |= TRB_CYCLE;
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} else
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@ -3212,7 +3196,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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/* Chain all the TRBs together; clear the chain bit in the last
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* TRB to indicate it's the last TRB in the chain.
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*/
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if (i < last_trb_num) {
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if (enqd_len + trb_buff_len < full_len) {
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field |= TRB_CHAIN;
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} else {
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field |= TRB_IOC;
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@ -3225,9 +3209,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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field |= TRB_ISP;
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/* Set the TRB length, TD size, and interrupter fields. */
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remainder = xhci_td_remainder(xhci, running_total,
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trb_buff_len, full_len,
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urb, more_trbs_coming);
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remainder = xhci_td_remainder(xhci, enqd_len, trb_buff_len,
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full_len, urb, more_trbs_coming);
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length_field = TRB_LEN(trb_buff_len) |
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TRB_TD_SIZE(remainder) |
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TRB_INTR_TARGET(0);
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@ -3238,17 +3222,16 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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length_field,
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field);
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running_total += trb_buff_len;
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addr += trb_buff_len;
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block_len -= trb_buff_len;
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if (sg) {
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if (block_len == 0) {
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/* New sg entry */
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--num_sgs;
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if (num_sgs == 0)
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break;
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if (sg && block_len == 0) {
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/* New sg entry */
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--num_sgs;
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if (num_sgs != 0) {
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sg = sg_next(sg);
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block_len = sg_dma_len(sg);
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addr = (u64) sg_dma_address(sg);
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}
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}
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}
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@ -3262,7 +3245,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
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queue_trb(xhci, ring, 0, 0, 0, TRB_INTR_TARGET(0), field);
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}
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check_trb_math(urb, running_total);
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check_trb_math(urb, enqd_len);
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giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id,
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start_cycle, start_trb);
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return 0;
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