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signal/x86/traps: Use force_sig_bnderr

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Instead of generating the siginfo in x86 specific code use the new
helper function force_sig_bnderr to separate the concerns of
collecting the information and generating a proper siginfo.

Making the code easier to understand and maintain.

Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
This commit is contained in:
Eric W. Biederman 2017-08-19 12:14:49 -05:00
parent 79e21d6540
commit 851ce9e697
1 changed files with 9 additions and 10 deletions
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19
arch/x86/kernel/traps.c
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@ -498,8 +498,8 @@ dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
break; /* Success, it was handled */ break; /* Success, it was handled */
case 1: /* Bound violation. */ case 1: /* Bound violation. */
{ {
struct task_struct *tsk = current;
struct mpx_fault_info mpx; struct mpx_fault_info mpx;
struct siginfo info;
if (mpx_fault_info(&mpx, regs)) { if (mpx_fault_info(&mpx, regs)) {
/* /*
@ -510,19 +510,18 @@ dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
} }
/* /*
* Success, we decoded the instruction and retrieved * Success, we decoded the instruction and retrieved
* an 'info' containing the address being accessed * an 'mpx' containing the address being accessed
* which caused the exception. This information * which caused the exception. This information
* allows and application to possibly handle the * allows and application to possibly handle the
* #BR exception itself. * #BR exception itself.
*/ */
clear_siginfo(&info); if (!do_trap_no_signal(tsk, X86_TRAP_BR, "bounds", regs,
info.si_signo = SIGSEGV; error_code))
info.si_errno = 0; break;
info.si_code = SEGV_BNDERR;
info.si_addr = mpx.addr; show_signal(tsk, SIGSEGV, "trap ", "bounds", regs, error_code);
info.si_lower = mpx.lower;
info.si_upper = mpx.upper; force_sig_bnderr(mpx.addr, mpx.lower, mpx.upper);
do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, &info);
break; break;
} }
case 0: /* No exception caused by Intel MPX operations. */ case 0: /* No exception caused by Intel MPX operations. */