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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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iommu/exynos: Use proper readl/writel register interface
Drivers should use generic readl/writel calls to access HW registers, so replace all __raw_readl/writel with generic version. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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dbf6c6efa7
commit
84bd042865
@ -268,18 +268,18 @@ static bool is_sysmmu_active(struct sysmmu_drvdata *data)
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static void sysmmu_unblock(struct sysmmu_drvdata *data)
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{
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__raw_writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
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writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
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}
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static bool sysmmu_block(struct sysmmu_drvdata *data)
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{
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int i = 120;
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__raw_writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
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while ((i > 0) && !(__raw_readl(data->sfrbase + REG_MMU_STATUS) & 1))
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writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
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while ((i > 0) && !(readl(data->sfrbase + REG_MMU_STATUS) & 1))
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--i;
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if (!(__raw_readl(data->sfrbase + REG_MMU_STATUS) & 1)) {
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if (!(readl(data->sfrbase + REG_MMU_STATUS) & 1)) {
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sysmmu_unblock(data);
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return false;
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}
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@ -290,9 +290,9 @@ static bool sysmmu_block(struct sysmmu_drvdata *data)
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static void __sysmmu_tlb_invalidate(struct sysmmu_drvdata *data)
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{
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if (MMU_MAJ_VER(data->version) < 5)
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__raw_writel(0x1, data->sfrbase + REG_MMU_FLUSH);
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writel(0x1, data->sfrbase + REG_MMU_FLUSH);
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else
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__raw_writel(0x1, data->sfrbase + REG_V5_MMU_FLUSH_ALL);
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writel(0x1, data->sfrbase + REG_V5_MMU_FLUSH_ALL);
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}
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static void __sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
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@ -302,10 +302,10 @@ static void __sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
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for (i = 0; i < num_inv; i++) {
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if (MMU_MAJ_VER(data->version) < 5)
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__raw_writel((iova & SPAGE_MASK) | 1,
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writel((iova & SPAGE_MASK) | 1,
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data->sfrbase + REG_MMU_FLUSH_ENTRY);
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else
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__raw_writel((iova & SPAGE_MASK) | 1,
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writel((iova & SPAGE_MASK) | 1,
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data->sfrbase + REG_V5_MMU_FLUSH_ENTRY);
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iova += SPAGE_SIZE;
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}
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@ -314,9 +314,9 @@ static void __sysmmu_tlb_invalidate_entry(struct sysmmu_drvdata *data,
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static void __sysmmu_set_ptbase(struct sysmmu_drvdata *data, phys_addr_t pgd)
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{
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if (MMU_MAJ_VER(data->version) < 5)
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__raw_writel(pgd, data->sfrbase + REG_PT_BASE_ADDR);
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writel(pgd, data->sfrbase + REG_PT_BASE_ADDR);
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else
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__raw_writel(pgd >> PAGE_SHIFT,
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writel(pgd >> PAGE_SHIFT,
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data->sfrbase + REG_V5_PT_BASE_PFN);
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__sysmmu_tlb_invalidate(data);
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@ -331,7 +331,7 @@ static void __sysmmu_get_version(struct sysmmu_drvdata *data)
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clk_enable(data->pclk);
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clk_enable(data->aclk);
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ver = __raw_readl(data->sfrbase + REG_MMU_VERSION);
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ver = readl(data->sfrbase + REG_MMU_VERSION);
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/* controllers on some SoCs don't report proper version */
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if (ver == 0x80000001u)
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@ -392,7 +392,7 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
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clk_enable(data->clk_master);
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itype = __ffs(__raw_readl(data->sfrbase + reg_status));
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itype = __ffs(readl(data->sfrbase + reg_status));
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for (i = 0; i < n; i++, finfo++)
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if (finfo->bit == itype)
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break;
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@ -400,7 +400,7 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
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BUG_ON(i == n);
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/* print debug message */
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fault_addr = __raw_readl(data->sfrbase + finfo->addr_reg);
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fault_addr = readl(data->sfrbase + finfo->addr_reg);
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show_fault_information(data, finfo, fault_addr);
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if (data->domain)
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@ -409,7 +409,7 @@ static irqreturn_t exynos_sysmmu_irq(int irq, void *dev_id)
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/* fault is not recovered by fault handler */
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BUG_ON(ret != 0);
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__raw_writel(1 << itype, data->sfrbase + reg_clear);
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writel(1 << itype, data->sfrbase + reg_clear);
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sysmmu_unblock(data);
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@ -424,8 +424,8 @@ static void __sysmmu_disable_nocount(struct sysmmu_drvdata *data)
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{
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clk_enable(data->clk_master);
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__raw_writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);
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__raw_writel(0, data->sfrbase + REG_MMU_CFG);
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writel(CTRL_DISABLE, data->sfrbase + REG_MMU_CTRL);
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writel(0, data->sfrbase + REG_MMU_CFG);
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clk_disable(data->aclk);
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clk_disable(data->pclk);
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@ -470,7 +470,7 @@ static void __sysmmu_init_config(struct sysmmu_drvdata *data)
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else
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cfg = CFG_QOS(15) | CFG_FLPDCACHE | CFG_ACGEN;
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__raw_writel(cfg, data->sfrbase + REG_MMU_CFG);
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writel(cfg, data->sfrbase + REG_MMU_CFG);
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}
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static void __sysmmu_enable_nocount(struct sysmmu_drvdata *data)
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@ -480,13 +480,13 @@ static void __sysmmu_enable_nocount(struct sysmmu_drvdata *data)
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clk_enable(data->pclk);
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clk_enable(data->aclk);
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__raw_writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
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writel(CTRL_BLOCK, data->sfrbase + REG_MMU_CTRL);
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__sysmmu_init_config(data);
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__sysmmu_set_ptbase(data, data->pgtable);
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__raw_writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
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writel(CTRL_ENABLE, data->sfrbase + REG_MMU_CTRL);
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clk_disable(data->clk_master);
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}
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