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drm/amdgpu: reset wptr at cp compute resume (v2)

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This patch is to resolve compute hang at resume time.

v2: (agd5f) squash in second fix

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
This commit is contained in:
Sonny Jiang 2015-06-23 11:59:55 -04:00 committed by Alex Deucher
parent dc78330a8e
commit 845253e78a
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
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@ -3144,6 +3144,12 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
mqd->cp_hqd_pq_doorbell_control);
/* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */
ring->wptr = 0;
mqd->cp_hqd_pq_wptr = ring->wptr;
WREG32(mmCP_HQD_PQ_WPTR, mqd->cp_hqd_pq_wptr);
mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);
/* set the vmid for the queue */
mqd->cp_hqd_vmid = 0;
WREG32(mmCP_HQD_VMID, mqd->cp_hqd_vmid);