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ath9k_hw: config diversity based on eeprom contents

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* enable LNA-diversity, fast-diversity for AR9485 based  on
  the value read from EEPROM content
* if antenna diversity/combining is supported, set LNA1 for the main
  antenna and LNA2 for the alternate antenna based on the new diversity
  algorithm

Cc: Gabriel Tseng <Gabriel.Tseng@Atheros.com>
Cc: Senthilkumar Balasubramanian <Senthilkumar.Balasubramanian@Atheros.com>
Cc: Luis Rodriguez <Luis.Rodriguez@Atheros.com>
Signed-off-by: Mohammed Shafi Shajakhan <mshajakhan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Mohammed Shafi Shajakhan 2011-05-13 20:30:27 +05:30 committed by John W. Linville
parent c6ba9feb4f
commit 842ca780af
1 changed files with 44 additions and 6 deletions
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50
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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@ -3498,6 +3498,8 @@ static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
{
int chain;
u32 regval;
u32 ant_div_ctl1;
static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
AR_PHY_SWITCH_CHAIN_0,
AR_PHY_SWITCH_CHAIN_1,
@ -3523,13 +3525,49 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
if (AR_SREV_9485(ah)) {
value = ath9k_hw_ar9300_get_eeprom(ah, EEP_ANT_DIV_CTL1);
REG_RMW_FIELD(ah, AR_PHY_MC_GAIN_CTRL, AR_ANT_DIV_CTRL_ALL,
value);
REG_RMW_FIELD(ah, AR_PHY_MC_GAIN_CTRL, AR_ANT_DIV_ENABLE,
value >> 6);
REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, AR_FAST_DIV_ENABLE,
value >> 7);
/*
* main_lnaconf, alt_lnaconf, main_tb, alt_tb
* are the fields present
*/
regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
regval &= (~AR_ANT_DIV_CTRL_ALL);
regval |= (value & 0x3f) << AR_ANT_DIV_CTRL_ALL_S;
/* enable_lnadiv */
regval &= (~AR_PHY_9485_ANT_DIV_LNADIV);
regval |= ((value >> 6) & 0x1) <<
AR_PHY_9485_ANT_DIV_LNADIV_S;
REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
/*enable fast_div */
regval = REG_READ(ah, AR_PHY_CCK_DETECT);
regval &= (~AR_FAST_DIV_ENABLE);
regval |= ((value >> 7) & 0x1) <<
AR_FAST_DIV_ENABLE_S;
REG_WRITE(ah, AR_PHY_CCK_DETECT, regval);
ant_div_ctl1 =
ah->eep_ops->get_eeprom(ah, EEP_ANT_DIV_CTL1);
/* check whether antenna diversity is enabled */
if ((ant_div_ctl1 >> 0x6) == 0x3) {
regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL);
/*
* clear bits 25-30 main_lnaconf, alt_lnaconf,
* main_tb, alt_tb
*/
regval &= (~(AR_PHY_9485_ANT_DIV_MAIN_LNACONF |
AR_PHY_9485_ANT_DIV_ALT_LNACONF |
AR_PHY_9485_ANT_DIV_ALT_GAINTB |
AR_PHY_9485_ANT_DIV_MAIN_GAINTB));
/* by default use LNA1 for the main antenna */
regval |= (AR_PHY_9485_ANT_DIV_LNA1 <<
AR_PHY_9485_ANT_DIV_MAIN_LNACONF_S);
regval |= (AR_PHY_9485_ANT_DIV_LNA2 <<
AR_PHY_9485_ANT_DIV_ALT_LNACONF_S);
REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval);
}
}
}
static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)