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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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iwlwifi: pcie: separate between SW and HW MSIX configuration
The MSIX configuration flow includes two different stages: configuring the HW by writing to the IVAR table and configuring the SW to reflect the HW configuration. The HW configuration is needed on each HW reset, whereas the SW configuration is only needed during the init flow. Signed-off-by: Haim Dreyfuss <haim.dreyfuss@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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@ -1147,7 +1147,7 @@ static void iwl_pcie_map_rx_causes(struct iwl_trans *trans)
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iwl_write8(trans, CSR_MSIX_RX_IVAR(1), val);
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}
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static void iwl_pcie_init_msix(struct iwl_trans_pcie *trans_pcie)
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static void iwl_pcie_conf_msix_hw(struct iwl_trans_pcie *trans_pcie)
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{
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struct iwl_trans *trans = trans_pcie->trans;
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@ -1170,12 +1170,20 @@ static void iwl_pcie_init_msix(struct iwl_trans_pcie *trans_pcie)
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iwl_pcie_map_rx_causes(trans);
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iwl_pcie_map_non_rx_causes(trans);
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}
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trans_pcie->fh_init_mask =
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~iwl_read32(trans, CSR_MSIX_FH_INT_MASK_AD);
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static void iwl_pcie_init_msix(struct iwl_trans_pcie *trans_pcie)
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{
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struct iwl_trans *trans = trans_pcie->trans;
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iwl_pcie_conf_msix_hw(trans_pcie);
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if (!trans_pcie->msix_enabled)
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return;
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trans_pcie->fh_init_mask = ~iwl_read32(trans, CSR_MSIX_FH_INT_MASK_AD);
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trans_pcie->fh_mask = trans_pcie->fh_init_mask;
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trans_pcie->hw_init_mask =
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~iwl_read32(trans, CSR_MSIX_HW_INT_MASK_AD);
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trans_pcie->hw_init_mask = ~iwl_read32(trans, CSR_MSIX_HW_INT_MASK_AD);
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trans_pcie->hw_mask = trans_pcie->hw_init_mask;
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}
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@ -1675,6 +1683,7 @@ static int _iwl_trans_pcie_start_hw(struct iwl_trans *trans, bool low_power)
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iwl_pcie_apm_init(trans);
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iwl_pcie_init_msix(trans_pcie);
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/* From now on, the op_mode will be kept updated about RF kill state */
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iwl_enable_rfkill_int(trans);
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