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powerpc/64s/hash: Use POWER9 SLBIA IH=3 variant in switch_slb
POWER9 introduces SLBIA IH=3, which invalidates all SLB entries and associated lookaside information that have a class value of 1, which Linux assigns to user addresses. This matches what switch_slb wants, and allows a simple fast implementation that avoids the slb_cache complexity. As a side-effect, the POWER5 < DD2.1 SLB invalidation workaround is also avoided on POWER9. Process context switching rate is improved about 2.2% for a small process that hits the slb cache which is the best case for the current code. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -279,7 +279,6 @@ static inline int esids_match(unsigned long addr1, unsigned long addr2)
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/* Flush all user entries from the segment table of the current processor. */
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void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
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{
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unsigned long offset;
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unsigned long pc = KSTK_EIP(tsk);
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unsigned long stack = KSTK_ESP(tsk);
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unsigned long exec_base;
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@ -291,45 +290,56 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
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* which would update the slb_cache/slb_cache_ptr fields in the PACA.
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*/
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hard_irq_disable();
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offset = get_paca()->slb_cache_ptr;
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if (!mmu_has_feature(MMU_FTR_NO_SLBIE_B) &&
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offset <= SLB_CACHE_ENTRIES) {
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unsigned long slbie_data = 0;
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int i;
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if (cpu_has_feature(CPU_FTR_ARCH_300)) {
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/*
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* SLBIA IH=3 invalidates all Class=1 SLBEs and their
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* associated lookaside structures, which matches what
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* switch_slb wants. So ARCH_300 does not use the slb
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* cache.
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*/
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asm volatile("isync ; " PPC_SLBIA(3)" ; isync");
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} else {
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unsigned long offset = get_paca()->slb_cache_ptr;
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asm volatile("isync" : : : "memory");
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for (i = 0; i < offset; i++) {
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slbie_data = (unsigned long)get_paca()->slb_cache[i]
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<< SID_SHIFT; /* EA */
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slbie_data |= user_segment_size(slbie_data)
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<< SLBIE_SSIZE_SHIFT;
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slbie_data |= SLBIE_C; /* C set for user addresses */
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asm volatile("slbie %0" : : "r" (slbie_data));
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if (!mmu_has_feature(MMU_FTR_NO_SLBIE_B) &&
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offset <= SLB_CACHE_ENTRIES) {
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unsigned long slbie_data = 0;
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int i;
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asm volatile("isync" : : : "memory");
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for (i = 0; i < offset; i++) {
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/* EA */
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slbie_data = (unsigned long)
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get_paca()->slb_cache[i] << SID_SHIFT;
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slbie_data |= user_segment_size(slbie_data)
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<< SLBIE_SSIZE_SHIFT;
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slbie_data |= SLBIE_C; /* user slbs have C=1 */
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asm volatile("slbie %0" : : "r" (slbie_data));
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}
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/* Workaround POWER5 < DD2.1 issue */
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if (!cpu_has_feature(CPU_FTR_ARCH_207S) && offset == 1)
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asm volatile("slbie %0" : : "r" (slbie_data));
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asm volatile("isync" : : : "memory");
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} else {
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struct slb_shadow *p = get_slb_shadow();
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unsigned long ksp_esid_data =
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be64_to_cpu(p->save_area[KSTACK_INDEX].esid);
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unsigned long ksp_vsid_data =
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be64_to_cpu(p->save_area[KSTACK_INDEX].vsid);
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asm volatile("isync\n"
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PPC_SLBIA(1) "\n"
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"slbmte %0,%1\n"
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"isync"
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:: "r"(ksp_vsid_data),
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"r"(ksp_esid_data));
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}
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/* Workaround POWER5 < DD2.1 issue */
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if (!cpu_has_feature(CPU_FTR_ARCH_207S) && offset == 1)
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asm volatile("slbie %0" : : "r" (slbie_data));
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asm volatile("isync" : : : "memory");
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} else {
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struct slb_shadow *p = get_slb_shadow();
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unsigned long ksp_esid_data =
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be64_to_cpu(p->save_area[KSTACK_INDEX].esid);
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unsigned long ksp_vsid_data =
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be64_to_cpu(p->save_area[KSTACK_INDEX].vsid);
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asm volatile("isync\n"
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PPC_SLBIA(1) "\n"
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"slbmte %0,%1\n"
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"isync"
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:: "r"(ksp_vsid_data),
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"r"(ksp_esid_data));
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asm volatile("isync" : : : "memory");
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get_paca()->slb_cache_ptr = 0;
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}
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get_paca()->slb_cache_ptr = 0;
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copy_mm_to_paca(mm);
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/*
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@ -455,6 +465,9 @@ static void insert_slb_entry(unsigned long vsid, unsigned long ea,
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enum slb_index index;
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int slb_cache_index;
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if (cpu_has_feature(CPU_FTR_ARCH_300))
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return; /* ISAv3.0B and later does not use slb_cache */
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/*
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* We are irq disabled, hence should be safe to access PACA.
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*/
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@ -2393,10 +2393,13 @@ static void dump_one_paca(int cpu)
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}
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}
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DUMP(p, vmalloc_sllp, "%#-*x");
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DUMP(p, slb_cache_ptr, "%#-*x");
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for (i = 0; i < SLB_CACHE_ENTRIES; i++)
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printf(" %-*s[%d] = 0x%016x\n",
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22, "slb_cache", i, p->slb_cache[i]);
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if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
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DUMP(p, slb_cache_ptr, "%#-*x");
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for (i = 0; i < SLB_CACHE_ENTRIES; i++)
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printf(" %-*s[%d] = 0x%016x\n",
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22, "slb_cache", i, p->slb_cache[i]);
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}
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DUMP(p, rfi_flush_fallback_area, "%-*px");
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#endif
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