mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 05:36:43 +07:00
ath9k: clean up tx buffer setup
Merge ath_tx_send_normal and ath_tx_send_ht_normal. Move the paprd state initialization and sequence number assignment to reduce the number of redundant checks. This not only simplifies buffer allocation error handling, but also removes a small inconsistency in the buffer HT flag. This flag should only be set if the frame is also a QoS data frame. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Felix Fietkau
John W. Linville
parent
61117f01e7
commit
82b873afe8
@ -48,9 +48,9 @@ static u16 bits_per_symbol[][2] = {
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#define IS_HT_RATE(_rate) ((_rate) & 0x80)
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static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct list_head *bf_head);
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static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct list_head *bf_head);
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static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
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struct ath_txq *txq, struct list_head *bf_q,
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struct ath_tx_status *ts, int txok, int sendbar);
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@ -160,7 +160,7 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
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ath_tx_update_baw(sc, tid, bf->bf_seqno);
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ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
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} else {
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ath_tx_send_ht_normal(sc, txq, tid, &bf_head);
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ath_tx_send_normal(sc, txq, tid, &bf_head);
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}
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}
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@ -1322,9 +1322,9 @@ static void ath_tx_send_ampdu(struct ath_softc *sc, struct ath_atx_tid *tid,
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ath_tx_txqaddbuf(sc, txctl->txq, bf_head);
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}
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static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct list_head *bf_head)
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static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct ath_atx_tid *tid,
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struct list_head *bf_head)
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{
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struct ath_buf *bf;
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@ -1332,7 +1332,8 @@ static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
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bf->bf_state.bf_type &= ~BUF_AMPDU;
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/* update starting sequence number for subsequent ADDBA request */
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INCR(tid->seq_start, IEEE80211_SEQ_MAX);
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if (tid)
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INCR(tid->seq_start, IEEE80211_SEQ_MAX);
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bf->bf_nframes = 1;
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bf->bf_lastbf = bf;
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@ -1341,20 +1342,6 @@ static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
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TX_STAT_INC(txq->axq_qnum, queued);
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}
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static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
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struct list_head *bf_head)
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{
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struct ath_buf *bf;
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bf = list_first_entry(bf_head, struct ath_buf, list);
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bf->bf_lastbf = bf;
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bf->bf_nframes = 1;
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ath_buf_set_rate(sc, bf);
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ath_tx_txqaddbuf(sc, txq, bf_head);
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TX_STAT_INC(txq->axq_qnum, queued);
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}
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static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
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{
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struct ieee80211_hdr *hdr;
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@ -1411,7 +1398,7 @@ static void assign_aggr_tid_seqno(struct sk_buff *skb,
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INCR(tid->seq_next, IEEE80211_SEQ_MAX);
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}
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static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc)
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static int setup_tx_flags(struct sk_buff *skb)
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{
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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int flags = 0;
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@ -1422,7 +1409,7 @@ static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc)
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if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
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flags |= ATH9K_TXDESC_NOACK;
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if (use_ldpc)
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if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
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flags |= ATH9K_TXDESC_LDPC;
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return flags;
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@ -1567,18 +1554,24 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
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ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192);
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}
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static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
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struct sk_buff *skb,
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struct ath_tx_control *txctl)
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static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw,
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struct sk_buff *skb)
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{
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struct ath_wiphy *aphy = hw->priv;
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struct ath_softc *sc = aphy->sc;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
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struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
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struct ath_buf *bf;
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int hdrlen;
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__le16 fc;
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int padpos, padsize;
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bool use_ldpc = false;
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bf = ath_tx_get_buffer(sc);
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if (!bf) {
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ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n");
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return NULL;
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}
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hdrlen = ieee80211_get_hdrlen_from_skb(skb);
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fc = hdr->frame_control;
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@ -1594,16 +1587,13 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
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bf->bf_frmlen -= padsize;
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}
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if (!txctl->paprd && conf_is_ht(&hw->conf)) {
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if (ieee80211_is_data_qos(fc) && conf_is_ht(&hw->conf)) {
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bf->bf_state.bf_type |= BUF_HT;
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if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
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use_ldpc = true;
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if (sc->sc_flags & SC_OP_TXAGGR)
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assign_aggr_tid_seqno(skb, bf);
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}
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bf->bf_state.bfs_paprd = txctl->paprd;
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if (txctl->paprd)
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bf->bf_state.bfs_paprd_timestamp = jiffies;
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bf->bf_flags = setup_tx_flags(skb, use_ldpc);
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bf->bf_flags = setup_tx_flags(skb);
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bf->bf_keytype = ath9k_cmn_get_hw_crypto_keytype(skb);
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if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR) {
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@ -1613,10 +1603,6 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
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bf->bf_keyix = ATH9K_TXKEYIX_INVALID;
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}
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if (ieee80211_is_data_qos(fc) && bf_isht(bf) &&
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(sc->sc_flags & SC_OP_TXAGGR))
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assign_aggr_tid_seqno(skb, bf);
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bf->bf_mpdu = skb;
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bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
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@ -1626,12 +1612,13 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
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bf->bf_buf_addr = 0;
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ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
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"dma_mapping_error() on TX\n");
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return -ENOMEM;
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ath_tx_return_buffer(sc, bf);
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return NULL;
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}
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bf->bf_tx_aborted = false;
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return 0;
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return bf;
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}
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/* FIXME: tx power */
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@ -1679,11 +1666,6 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
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an = (struct ath_node *)tx_info->control.sta->drv_priv;
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tid = ATH_AN_2_TID(an, bf->bf_tidno);
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if (!ieee80211_is_data_qos(fc)) {
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ath_tx_send_normal(sc, txctl->txq, &bf_head);
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goto tx_done;
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}
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WARN_ON(tid->ac->txq != txctl->txq);
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if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
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/*
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@ -1696,15 +1678,18 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf,
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* Send this frame as regular when ADDBA
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* exchange is neither complete nor pending.
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*/
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ath_tx_send_ht_normal(sc, txctl->txq,
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tid, &bf_head);
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ath_tx_send_normal(sc, txctl->txq, tid, &bf_head);
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}
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} else {
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bf->bf_state.bfs_ftype = txctl->frame_type;
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ath_tx_send_normal(sc, txctl->txq, &bf_head);
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bf->bf_state.bfs_paprd = txctl->paprd;
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if (txctl->paprd)
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bf->bf_state.bfs_paprd_timestamp = jiffies;
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ath_tx_send_normal(sc, txctl->txq, NULL, &bf_head);
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}
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tx_done:
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spin_unlock_bh(&txctl->txq->axq_lock);
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}
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@ -1714,39 +1699,15 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
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{
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struct ath_wiphy *aphy = hw->priv;
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struct ath_softc *sc = aphy->sc;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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struct ath_txq *txq = txctl->txq;
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struct ath_buf *bf;
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int q, r;
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int q;
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bf = ath_tx_get_buffer(sc);
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if (!bf) {
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ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n");
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return -1;
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}
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bf = ath_tx_setup_buffer(hw, skb);
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if (unlikely(!bf))
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return -ENOMEM;
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q = skb_get_queue_mapping(skb);
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r = ath_tx_setup_buffer(hw, bf, skb, txctl);
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if (unlikely(r)) {
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ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n");
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/* upon ath_tx_processq() this TX queue will be resumed, we
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* guarantee this will happen by knowing beforehand that
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* we will at least have to run TX completionon one buffer
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* on the queue */
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spin_lock_bh(&txq->axq_lock);
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if (txq == sc->tx.txq_map[q] && !txq->stopped &&
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txq->axq_depth > 1) {
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ath_mac80211_stop_queue(sc, q);
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txq->stopped = 1;
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}
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spin_unlock_bh(&txq->axq_lock);
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ath_tx_return_buffer(sc, bf);
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return r;
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}
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spin_lock_bh(&txq->axq_lock);
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if (txq == sc->tx.txq_map[q] &&
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++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
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