arm: Xilinx Zynq dt patches for v4.10

- Remove skeleton.dtsi
 - Fix DTC warnings
 - Coding style changes
 - Microzed support
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Merge tag 'zynq-dt-for-4.10' of https://github.com/Xilinx/linux-xlnx into next/dt

arm: Xilinx Zynq dt patches for v4.10

- Remove skeleton.dtsi
- Fix DTC warnings
- Coding style changes
- Microzed support

* tag 'zynq-dt-for-4.10' of https://github.com/Xilinx/linux-xlnx:
  arm: dts: zynq: Add MicroZed board support
  ARM: zynq: Fix pmu register description coding style
  ARM: zynq: Fix W=1 dtc 1.4 warnings
  ARM: zynq: Remove skeleton.dtsi

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2016-12-07 12:38:43 -08:00
commit 8237c0b957
8 changed files with 108 additions and 9 deletions

View File

@ -923,6 +923,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \
wm8750-apc8750.dtb \
wm8850-w70v2.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-microzed.dtb \
zynq-parallella.dtb \
zynq-zc702.dtb \
zynq-zc706.dtb \

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@ -10,9 +10,10 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/include/ "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-7000";
cpus {
@ -41,14 +42,15 @@ cpu1: cpu@1 {
};
};
pmu {
pmu@f8891000 {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 5 4>, <0 6 4>;
interrupt-parent = <&intc>;
reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
reg = <0xf8891000 0x1000>,
<0xf8893000 0x1000>;
};
regulator_vccpint: fixedregulator@0 {
regulator_vccpint: fixedregulator {
compatible = "regulator-fixed";
regulator-name = "VCCPINT";
regulator-min-microvolt = <1000000>;

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@ -0,0 +1,96 @@
/*
* Copyright (C) 2011 - 2014 Xilinx
* Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
/ {
model = "Zynq MicroZED Development Board";
compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
aliases {
ethernet0 = &gem0;
serial0 = &uart1;
};
memory {
device_type = "memory";
reg = <0x0 0x40000000>;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
usb_phy0: phy0 {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
};
&clkc {
ps-clk-frequency = <33333333>;
};
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>;
ethernet_phy: ethernet-phy@0 {
reg = <0>;
};
};
&sdhci0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0_default>;
};
&pinctrl0 {
pinctrl_usb0_default: usb0-default {
mux {
groups = "usb0_0_grp";
function = "usb0";
};
conf {
groups = "usb0_0_grp";
slew-rate = <0>;
io-standard = <1>;
};
conf-rx {
pins = "MIO29", "MIO31", "MIO36";
bias-high-impedance;
};
conf-tx {
pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
"MIO35", "MIO37", "MIO38", "MIO39";
bias-disable;
};
};
};

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@ -28,7 +28,7 @@ aliases {
serial0 = &uart1;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};

View File

@ -24,7 +24,7 @@ aliases {
serial0 = &uart1;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};

View File

@ -24,7 +24,7 @@ aliases {
serial0 = &uart1;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x40000000>;
};

View File

@ -23,7 +23,7 @@ aliases {
serial0 = &uart1;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
};

View File

@ -23,7 +23,7 @@ aliases {
serial0 = &uart1;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
};