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arm: Xilinx Zynq dt patches for v4.10
- Remove skeleton.dtsi - Fix DTC warnings - Coding style changes - Microzed support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlhGs0YACgkQykllyylKDCFxKQCfb0fzHzG4hUPQrByM0lk8CYJy 5AMAniRgQNDaVFds5SCGXhFzNqS90PMa =RK/x -----END PGP SIGNATURE----- Merge tag 'zynq-dt-for-4.10' of https://github.com/Xilinx/linux-xlnx into next/dt arm: Xilinx Zynq dt patches for v4.10 - Remove skeleton.dtsi - Fix DTC warnings - Coding style changes - Microzed support * tag 'zynq-dt-for-4.10' of https://github.com/Xilinx/linux-xlnx: arm: dts: zynq: Add MicroZed board support ARM: zynq: Fix pmu register description coding style ARM: zynq: Fix W=1 dtc 1.4 warnings ARM: zynq: Remove skeleton.dtsi Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
8237c0b957
@ -923,6 +923,7 @@ dtb-$(CONFIG_ARCH_VT8500) += \
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wm8750-apc8750.dtb \
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wm8850-w70v2.dtb
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dtb-$(CONFIG_ARCH_ZYNQ) += \
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zynq-microzed.dtb \
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zynq-parallella.dtb \
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zynq-zc702.dtb \
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zynq-zc706.dtb \
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@ -10,9 +10,10 @@
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/include/ "skeleton.dtsi"
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "xlnx,zynq-7000";
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cpus {
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@ -41,14 +42,15 @@ cpu1: cpu@1 {
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};
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};
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pmu {
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pmu@f8891000 {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 5 4>, <0 6 4>;
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interrupt-parent = <&intc>;
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reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
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reg = <0xf8891000 0x1000>,
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<0xf8893000 0x1000>;
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};
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regulator_vccpint: fixedregulator@0 {
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regulator_vccpint: fixedregulator {
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compatible = "regulator-fixed";
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regulator-name = "VCCPINT";
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regulator-min-microvolt = <1000000>;
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96
arch/arm/boot/dts/zynq-microzed.dts
Normal file
96
arch/arm/boot/dts/zynq-microzed.dts
Normal file
@ -0,0 +1,96 @@
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/*
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* Copyright (C) 2011 - 2014 Xilinx
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* Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq MicroZED Development Board";
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compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart1;
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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usb_phy0: phy0 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&sdhci0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb0_default>;
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};
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&pinctrl0 {
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pinctrl_usb0_default: usb0-default {
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mux {
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groups = "usb0_0_grp";
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function = "usb0";
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};
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conf {
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groups = "usb0_0_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO29", "MIO31", "MIO36";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
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"MIO35", "MIO37", "MIO38", "MIO39";
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bias-disable;
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};
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};
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};
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@ -28,7 +28,7 @@ aliases {
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serial0 = &uart1;
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};
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memory {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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@ -24,7 +24,7 @@ aliases {
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serial0 = &uart1;
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};
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memory {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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@ -24,7 +24,7 @@ aliases {
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serial0 = &uart1;
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};
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memory {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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@ -23,7 +23,7 @@ aliases {
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serial0 = &uart1;
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};
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memory {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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};
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@ -23,7 +23,7 @@ aliases {
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serial0 = &uart1;
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};
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memory {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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};
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