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drm/vc4: crtc: Only access the PixelValve registers if we have to
The CRTC hooks are called both for the TXP and the pixelvalve, yet some will read / write the registers as if the device was a pixelvalve, which won't really work. Let's make sure we only access those registers if we are running on a PixelValve. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Reviewed-by: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/b55e31869304c748920c261eba87b3275dbeb297.1591882579.git-series.maxime@cerno.tech
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@ -357,6 +357,7 @@ static void require_hvs_enabled(struct drm_device *dev)
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static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
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struct drm_crtc_state *old_state)
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{
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struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
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struct drm_device *dev = crtc->dev;
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struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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int ret;
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@ -366,10 +367,12 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
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/* Disable vblank irq handling before crtc is disabled. */
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drm_crtc_vblank_off(crtc);
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if (!vc4_state->feed_txp) {
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CRTC_WRITE(PV_V_CONTROL,
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CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
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ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
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WARN_ONCE(ret, "Timeout waiting for !PV_VCONTROL_VIDEN\n");
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}
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vc4_hvs_atomic_disable(crtc, old_state);
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@ -502,6 +505,10 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
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static int vc4_enable_vblank(struct drm_crtc *crtc)
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{
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struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
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if (vc4_state->feed_txp)
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return 0;
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CRTC_WRITE(PV_INTEN, PV_INT_VFP_START);
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@ -511,6 +518,10 @@ static int vc4_enable_vblank(struct drm_crtc *crtc)
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static void vc4_disable_vblank(struct drm_crtc *crtc)
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{
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struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
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if (vc4_state->feed_txp)
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return;
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CRTC_WRITE(PV_INTEN, 0);
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}
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