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drm/vc4: crtc: Only access the PixelValve registers if we have to

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The CRTC hooks are called both for the TXP and the pixelvalve, yet some
will read / write the registers as if the device was a pixelvalve, which
won't really work.

Let's make sure we only access those registers if we are running on a
PixelValve.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/b55e31869304c748920c261eba87b3275dbeb297.1591882579.git-series.maxime@cerno.tech
This commit is contained in:
Maxime Ripard 2020-06-11 15:36:50 +02:00
parent 5a20ff8bf3
commit 811a850cbd
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
1 changed files with 15 additions and 4 deletions
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19
drivers/gpu/drm/vc4/vc4_crtc.c
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@ -357,6 +357,7 @@ static void require_hvs_enabled(struct drm_device *dev)
static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
struct drm_crtc_state *old_state)
{
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
struct drm_device *dev = crtc->dev;
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
int ret;
@ -366,10 +367,12 @@ static void vc4_crtc_atomic_disable(struct drm_crtc *crtc,
/* Disable vblank irq handling before crtc is disabled. */
drm_crtc_vblank_off(crtc);
CRTC_WRITE(PV_V_CONTROL,
CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
WARN_ONCE(ret, "Timeout waiting for !PV_VCONTROL_VIDEN\n");
if (!vc4_state->feed_txp) {
CRTC_WRITE(PV_V_CONTROL,
CRTC_READ(PV_V_CONTROL) & ~PV_VCONTROL_VIDEN);
ret = wait_for(!(CRTC_READ(PV_V_CONTROL) & PV_VCONTROL_VIDEN), 1);
WARN_ONCE(ret, "Timeout waiting for !PV_VCONTROL_VIDEN\n");
}
vc4_hvs_atomic_disable(crtc, old_state);
@ -502,6 +505,10 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
static int vc4_enable_vblank(struct drm_crtc *crtc)
{
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
if (vc4_state->feed_txp)
return 0;
CRTC_WRITE(PV_INTEN, PV_INT_VFP_START);
@ -511,6 +518,10 @@ static int vc4_enable_vblank(struct drm_crtc *crtc)
static void vc4_disable_vblank(struct drm_crtc *crtc)
{
struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
if (vc4_state->feed_txp)
return;
CRTC_WRITE(PV_INTEN, 0);
}