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drm/i915: there's no DSPPOS register on gen4+
So don't read it when capturing the error state. This solves some "unclaimed register" messages on Haswell when we hang the GPU. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -9372,9 +9372,10 @@ intel_display_capture_error_state(struct drm_device *dev)
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error->plane[i].control = I915_READ(DSPCNTR(i));
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error->plane[i].control = I915_READ(DSPCNTR(i));
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error->plane[i].stride = I915_READ(DSPSTRIDE(i));
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error->plane[i].stride = I915_READ(DSPSTRIDE(i));
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if (INTEL_INFO(dev)->gen <= 3)
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if (INTEL_INFO(dev)->gen <= 3) {
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error->plane[i].size = I915_READ(DSPSIZE(i));
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error->plane[i].size = I915_READ(DSPSIZE(i));
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error->plane[i].pos = I915_READ(DSPPOS(i));
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error->plane[i].pos = I915_READ(DSPPOS(i));
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}
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if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
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if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
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error->plane[i].addr = I915_READ(DSPADDR(i));
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error->plane[i].addr = I915_READ(DSPADDR(i));
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if (INTEL_INFO(dev)->gen >= 4) {
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if (INTEL_INFO(dev)->gen >= 4) {
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@ -9417,9 +9418,10 @@ intel_display_print_error_state(struct seq_file *m,
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seq_printf(m, "Plane [%d]:\n", i);
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seq_printf(m, "Plane [%d]:\n", i);
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seq_printf(m, " CNTR: %08x\n", error->plane[i].control);
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seq_printf(m, " CNTR: %08x\n", error->plane[i].control);
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seq_printf(m, " STRIDE: %08x\n", error->plane[i].stride);
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seq_printf(m, " STRIDE: %08x\n", error->plane[i].stride);
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if (INTEL_INFO(dev)->gen <= 3)
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if (INTEL_INFO(dev)->gen <= 3) {
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seq_printf(m, " SIZE: %08x\n", error->plane[i].size);
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seq_printf(m, " SIZE: %08x\n", error->plane[i].size);
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seq_printf(m, " POS: %08x\n", error->plane[i].pos);
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seq_printf(m, " POS: %08x\n", error->plane[i].pos);
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}
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if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
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if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))
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seq_printf(m, " ADDR: %08x\n", error->plane[i].addr);
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seq_printf(m, " ADDR: %08x\n", error->plane[i].addr);
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if (INTEL_INFO(dev)->gen >= 4) {
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if (INTEL_INFO(dev)->gen >= 4) {
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