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Merge branch 'upstream-fixes' into upstream

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This commit is contained in:
Jeff Garzik 2006-09-12 11:42:45 -04:00
commit 8083e16562
101 changed files with 907 additions and 527 deletions
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1
arch/arm/mach-ixp4xx/nslu2-pci.c
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@ -17,6 +17,7 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>

1
arch/arm/mach-ixp4xx/nslu2-power.c
View File

@ -19,6 +19,7 @@
#include <linux/module.h>
#include <linux/reboot.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>

1
arch/arm/mach-s3c2410/Makefile
View File

@ -28,6 +28,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
# S3C2412 support
obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
obj-$(CONFIG_CPU_S3C2412) += s3c2412-irq.o
obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o
#

10
arch/arm/mach-s3c2410/cpu.h
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@ -8,16 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 24-Aug-2004 BJD Start of generic S3C24XX support
* 18-Oct-2004 BJD Moved board struct into this file
* 04-Jan-2005 BJD New uart initialisation
* 10-Jan-2005 BJD Moved generic init here, specific to cpu headers
* 14-Jan-2005 BJD Added s3c24xx_init_clocks() call
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ} & IODESC_ENT
* 14-Mar-2005 BJD Updated for __iomem
* 15-Jan-2006 LCVR Updated S3C2410_PA_##x to new S3C24XX_PA_##x macro
*/
/* todo - fix when rmk changes iodescs to use `void __iomem *` */

12
arch/arm/mach-s3c2410/devs.c
View File

@ -1,22 +1,14 @@
/* linux/arch/arm/mach-s3c2410/devs.c
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* Ben Dooks <ben@simtec.co.uk>
*
* Base S3C2410 platform device definitions
* Base S3C24XX platform device definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 15-Jan-2006 LCVR Using S3C24XX_PA_##x macro for common S3C24XX devices
* 10-Mar-2005 LCVR Changed S3C2410_{VA,SZ} to S3C24XX_{VA,SZ}
* 10-Feb-2005 BJD Added camera from guillaume.gourat@nexvision.tv
* 29-Aug-2004 BJD Added timers 0 through 3
* 29-Aug-2004 BJD Changed index of devices we only have one of to -1
* 21-Aug-2004 BJD Added IRQ_TICK to RTC resources
* 18-Aug-2004 BJD Created initial version
*/
#include <linux/kernel.h>

4
arch/arm/mach-s3c2410/irq.c
View File

@ -86,7 +86,7 @@ unsigned long s3c_irqwake_intmask = 0xffffffffL;
unsigned long s3c_irqwake_eintallow = 0x0000fff0L;
unsigned long s3c_irqwake_eintmask = 0xffffffffL;
static int
int
s3c_irq_wake(unsigned int irqno, unsigned int state)
{
unsigned long irqbit = 1 << (irqno - IRQ_EINT0);
@ -260,7 +260,7 @@ s3c_irqext_unmask(unsigned int irqno)
s3c_irq_unmask((irqno <= (IRQ_EINT7 - EXTINT_OFF)) ? IRQ_EINT4t7 : IRQ_EINT8t23);
}
static int
int
s3c_irqext_type(unsigned int irq, unsigned int type)
{
void __iomem *extint_reg;

5
arch/arm/mach-s3c2410/irq.h
View File

@ -97,3 +97,8 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
__raw_writel(parentmask, S3C2410_INTPND);
}
}
/* exported for use in arch/arm/mach-s3c2410 */
extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
extern int s3c_irqext_type(unsigned int irq, unsigned int type);

25
arch/arm/mach-s3c2410/mach-bast.c
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@ -8,31 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 14-Sep-2004 BJD USB power control
* 20-Aug-2004 BJD Added s3c2410_board struct
* 18-Aug-2004 BJD Added platform devices from default set
* 16-May-2003 BJD Created initial version
* 16-Aug-2003 BJD Fixed header files and copyright, added URL
* 05-Sep-2003 BJD Moved to v2.6 kernel
* 06-Jan-2003 BJD Updates for <arch/map.h>
* 18-Jan-2003 BJD Added serial port configuration
* 05-Oct-2004 BJD Power management code
* 04-Nov-2004 BJD Updated serial port clocks
* 04-Jan-2005 BJD New uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Add support for muitlple NAND devices
* 03-Mar-2005 BJD Ensured that bast-cpld.h is included
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 14-Mar-2005 BJD Updated for __iomem changes
* 22-Jun-2005 BJD Added DM9000 platform information
* 28-Jun-2005 BJD Moved pm functionality out to common code
* 17-Jul-2005 BJD Changed to platform device for SuperIO 16550s
* 25-Jul-2005 BJD Removed ASIX static mappings
* 27-Jul-2005 BJD Ensure maximum frequency of i2c bus
* 20-Sep-2005 BJD Added static to non-exported items
* 26-Oct-2005 BJD Added FB platform data
*/
#include <linux/kernel.h>

17
arch/arm/mach-s3c2410/mach-h1940.c
View File

@ -9,23 +9,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 16-May-2003 BJD Created initial version
* 16-Aug-2003 BJD Fixed header files and copyright, added URL
* 05-Sep-2003 BJD Moved to v2.6 kernel
* 06-Jan-2003 BJD Updates for <arch/map.h>
* 18-Jan-2003 BJD Added serial port configuration
* 17-Feb-2003 BJD Copied to mach-ipaq.c
* 21-Aug-2004 BJD Added struct s3c2410_board
* 04-Sep-2004 BJD Changed uart init, renamed ipaq_ -> h1940_
* 18-Oct-2004 BJD Updated new board structure name
* 04-Nov-2004 BJD Change for new serial clock
* 04-Jan-2005 BJD Updated uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Added clock init
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 20-Sep-2005 BJD Added static to non-exported items
* 26-Oct-2005 BJD Changed name of fb init call
*/
#include <linux/kernel.h>

9
arch/arm/mach-s3c2410/mach-rx3715.c
View File

@ -9,15 +9,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 16-Sep-2004 BJD Copied from mach-h1940.c
* 25-Oct-2004 BJD Updates for 2.6.10-rc1
* 10-Jan-2005 BJD Removed include of s3c2410.h s3c2440.h
* 14-Jan-2005 BJD Added new clock init
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 14-Mar-2005 BJD Fixed __iomem warnings
* 20-Sep-2005 BJD Added static to non-exported items
* 31-Oct-2005 BJD Added LCD setup for framebuffer
*/
#include <linux/kernel.h>

4
arch/arm/mach-s3c2410/mach-smdk2410.c
View File

@ -27,10 +27,6 @@
* derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
* Ben Dooks <ben@simtec.co.uk>
*
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 20-Sep-2005 BJD Added static to non-exported items
* 01-Apr-2006 BJD Moved init code to common smdk
*
***********************************************************************/
#include <linux/kernel.h>

15
arch/arm/mach-s3c2410/mach-smdk2413.c
View File

@ -112,7 +112,20 @@ static void __init smdk2413_machine_init(void)
smdk_machine_init();
}
MACHINE_START(S3C2413, "SMDK2413")
MACHINE_START(S3C2413, "S3C2413")
/* Maintainer: Ben Dooks <ben@fluff.org> */
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
.boot_params = S3C2410_SDRAM_PA + 0x100,
.fixup = smdk2413_fixup,
.init_irq = s3c24xx_init_irq,
.map_io = smdk2413_map_io,
.init_machine = smdk2413_machine_init,
.timer = &s3c24xx_timer,
MACHINE_END
MACHINE_START(SMDK2413, "SMDK2413")
/* Maintainer: Ben Dooks <ben@fluff.org> */
.phys_io = S3C2410_PA_UART,
.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,

19
arch/arm/mach-s3c2410/mach-vr1000.c
View File

@ -10,25 +10,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 14-Sep-2004 BJD USB Power control
* 04-Sep-2004 BJD Added new uart init, and io init
* 21-Aug-2004 BJD Added struct s3c2410_board
* 06-Aug-2004 BJD Fixed call to time initialisation
* 05-Apr-2004 BJD Copied to make mach-vr1000.c
* 18-Oct-2004 BJD Updated board struct
* 04-Nov-2004 BJD Clock and serial configuration update
*
* 04-Jan-2005 BJD Updated uart init call
* 10-Jan-2005 BJD Removed include of s3c2410.h
* 14-Jan-2005 BJD Added clock init
* 15-Jan-2005 BJD Add serial port device definition
* 20-Jan-2005 BJD Use UPF_IOREMAP for ports
* 10-Feb-2005 BJD Added power-off capability
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 14-Mar-2006 BJD void __iomem fixes
* 22-Jun-2006 BJD Added DM9000 platform information
* 20-Sep-2005 BJD Added static to non-exported items
*/
#include <linux/kernel.h>

5
arch/arm/mach-s3c2410/s3c2400-gpio.c
View File

@ -17,10 +17,7 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Changelog
* 15-Jan-2006 LCVR Splitted from gpio.c, adding support for the S3C2400
*/
*/
#include <linux/kernel.h>
#include <linux/init.h>

8
arch/arm/mach-s3c2410/s3c2410.h
View File

@ -9,14 +9,6 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 18-Aug-2004 BJD Created initial version
* 20-Aug-2004 BJD Added s3c2410_board struct
* 04-Sep-2004 BJD Added s3c2410_init_uarts() call
* 17-Oct-2004 BJD Moved board out to cpu
* 04-Jan-2005 BJD Changed uart init
* 10-Jan-2005 BJD Removed timer to cpu.h, moved 2410 specific bits here
* 14-Jan-2005 BJD Added s3c2410_init_clocks call
*/
#ifdef CONFIG_CPU_S3C2410

130
arch/arm/mach-s3c2410/s3c2412-irq.c Normal file
View File

@ -0,0 +1,130 @@
/* linux/arch/arm/mach-s3c2412/s3c2412-irq.c
*
* Copyright (c) 2006 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/ptrace.h>
#include <linux/sysdev.h>
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/irq.h>
#include <asm/arch/regs-irq.h>
#include <asm/arch/regs-gpio.h>
#include "cpu.h"
#include "irq.h"
/* the s3c2412 changes the behaviour of IRQ_EINT0 through IRQ_EINT3 by
* having them turn up in both the INT* and the EINT* registers. Whilst
* both show the status, they both now need to be acked when the IRQs
* go off.
*/
static void
s3c2412_irq_mask(unsigned int irqno)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;
mask = __raw_readl(S3C2410_INTMSK);
__raw_writel(mask | bitval, S3C2410_INTMSK);
mask = __raw_readl(S3C2412_EINTMASK);
__raw_writel(mask | bitval, S3C2412_EINTMASK);
}
static inline void
s3c2412_irq_ack(unsigned int irqno)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
__raw_writel(bitval, S3C2412_EINTPEND);
__raw_writel(bitval, S3C2410_SRCPND);
__raw_writel(bitval, S3C2410_INTPND);
}
static inline void
s3c2412_irq_maskack(unsigned int irqno)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;
mask = __raw_readl(S3C2410_INTMSK);
__raw_writel(mask|bitval, S3C2410_INTMSK);
mask = __raw_readl(S3C2412_EINTMASK);
__raw_writel(mask | bitval, S3C2412_EINTMASK);
__raw_writel(bitval, S3C2412_EINTPEND);
__raw_writel(bitval, S3C2410_SRCPND);
__raw_writel(bitval, S3C2410_INTPND);
}
static void
s3c2412_irq_unmask(unsigned int irqno)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long mask;
mask = __raw_readl(S3C2412_EINTMASK);
__raw_writel(mask & ~bitval, S3C2412_EINTMASK);
mask = __raw_readl(S3C2410_INTMSK);
__raw_writel(mask & ~bitval, S3C2410_INTMSK);
}
static struct irqchip s3c2412_irq_eint0t4 = {
.ack = s3c2412_irq_ack,
.mask = s3c2412_irq_mask,
.unmask = s3c2412_irq_unmask,
.set_wake = s3c_irq_wake,
.set_type = s3c_irqext_type,
};
static int s3c2412_irq_add(struct sys_device *sysdev)
{
unsigned int irqno;
for (irqno = IRQ_EINT0; irqno <= IRQ_EINT3; irqno++) {
set_irq_chip(irqno, &s3c2412_irq_eint0t4);
set_irq_handler(irqno, do_edge_IRQ);
set_irq_flags(irqno, IRQF_VALID);
}
return 0;
}
static struct sysdev_driver s3c2412_irq_driver = {
.add = s3c2412_irq_add,
};
static int s3c2412_irq_init(void)
{
return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_irq_driver);
}
arch_initcall(s3c2412_irq_init);

3
arch/arm/mach-s3c2410/s3c2440-irq.c
View File

@ -17,9 +17,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Changelog:
* 25-Jul-2005 BJD Split from irq.c
*
*/
#include <linux/init.h>

12
arch/arm/mach-s3c2410/s3c244x-irq.c
View File

@ -17,9 +17,6 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Changelog:
* 25-Jul-2005 BJD Split from irq.c
*
*/
#include <linux/init.h>
@ -122,21 +119,24 @@ static int s3c244x_irq_add(struct sys_device *sysdev)
return 0;
}
static struct sysdev_driver s3c244x_irq_driver = {
static struct sysdev_driver s3c2440_irq_driver = {
.add = s3c244x_irq_add,
};
static int s3c2440_irq_init(void)
{
return sysdev_driver_register(&s3c2440_sysclass, &s3c244x_irq_driver);
return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
}
arch_initcall(s3c2440_irq_init);
static struct sysdev_driver s3c2442_irq_driver = {
.add = s3c244x_irq_add,
};
static int s3c2442_irq_init(void)
{
return sysdev_driver_register(&s3c2442_sysclass, &s3c244x_irq_driver);
return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_irq_driver);
}
arch_initcall(s3c2442_irq_init);

2
arch/arm/mm/proc-arm926.S
View File

@ -480,7 +480,7 @@ __arm926_proc_info:
b __arm926_setup
.long cpu_arch_name
.long cpu_elf_name
.long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP|HWCAP_JAVA
.long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_VFP|HWCAP_EDSP|HWCAP_JAVA
.long cpu_arm926_name
.long arm926_processor_functions
.long v4wbi_tlb_fns

28
arch/i386/kernel/audit.c
View File

@ -8,13 +8,41 @@ static unsigned dir_class[] = {
~0U
};
static unsigned read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
static unsigned write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
static unsigned chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
int audit_classify_syscall(int abi, unsigned syscall)
{
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 0;
}
}
static int __init audit_classes_init(void)
{
audit_register_class(AUDIT_CLASS_WRITE, write_class);
audit_register_class(AUDIT_CLASS_READ, read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class);
audit_register_class(AUDIT_CLASS_CHATTR, chattr_class);
return 0;

26
arch/ia64/ia32/audit.c
View File

@ -9,3 +9,29 @@ unsigned ia32_chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
unsigned ia32_write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
unsigned ia32_read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
int ia32_classify_syscall(unsigned syscall)
{
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 1;
}
}

35
arch/ia64/kernel/audit.c
View File

@ -8,19 +8,54 @@ static unsigned dir_class[] = {
~0U
};
static unsigned read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
static unsigned write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
static unsigned chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
int audit_classify_syscall(int abi, unsigned syscall)
{
#ifdef CONFIG_IA32_SUPPORT
extern int ia32_classify_syscall(unsigned);
if (abi == AUDIT_ARCH_I386)
return ia32_classify_syscall(syscall);
#endif
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_execve:
return 5;
default:
return 0;
}
}
static int __init audit_classes_init(void)
{
#ifdef CONFIG_IA32_SUPPORT
extern __u32 ia32_dir_class[];
extern __u32 ia32_write_class[];
extern __u32 ia32_read_class[];
extern __u32 ia32_chattr_class[];
audit_register_class(AUDIT_CLASS_WRITE_32, ia32_write_class);
audit_register_class(AUDIT_CLASS_READ_32, ia32_read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE_32, ia32_dir_class);
audit_register_class(AUDIT_CLASS_CHATTR_32, ia32_chattr_class);
#endif
audit_register_class(AUDIT_CLASS_WRITE, write_class);
audit_register_class(AUDIT_CLASS_READ, read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class);
audit_register_class(AUDIT_CLASS_CHATTR, chattr_class);
return 0;

2
arch/powerpc/kernel/Makefile
View File

@ -70,6 +70,8 @@ obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y)
kexec-$(CONFIG_PPC64) := machine_kexec_64.o
kexec-$(CONFIG_PPC32) := machine_kexec_32.o
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y)
obj-$(CONFIG_AUDIT) += audit.o
obj64-$(CONFIG_AUDIT) += compat_audit.o
ifeq ($(CONFIG_PPC_ISERIES),y)
$(obj)/head_64.o: $(obj)/lparmap.s

66
arch/powerpc/kernel/audit.c Normal file
View File

@ -0,0 +1,66 @@
#include <linux/init.h>
#include <linux/types.h>
#include <linux/audit.h>
#include <asm/unistd.h>
static unsigned dir_class[] = {
#include <asm-generic/audit_dir_write.h>
~0U
};
static unsigned read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
static unsigned write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
static unsigned chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
int audit_classify_syscall(int abi, unsigned syscall)
{
#ifdef CONFIG_PPC64
extern int ppc32_classify_syscall(unsigned);
if (abi == AUDIT_ARCH_PPC)
return ppc32_classify_syscall(syscall);
#endif
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 0;
}
}
static int __init audit_classes_init(void)
{
#ifdef CONFIG_PPC64
extern __u32 ppc32_dir_class[];
extern __u32 ppc32_write_class[];
extern __u32 ppc32_read_class[];
extern __u32 ppc32_chattr_class[];
audit_register_class(AUDIT_CLASS_WRITE_32, ppc32_write_class);
audit_register_class(AUDIT_CLASS_READ_32, ppc32_read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE_32, ppc32_dir_class);
audit_register_class(AUDIT_CLASS_CHATTR_32, ppc32_chattr_class);
#endif
audit_register_class(AUDIT_CLASS_WRITE, write_class);
audit_register_class(AUDIT_CLASS_READ, read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class);
audit_register_class(AUDIT_CLASS_CHATTR, chattr_class);
return 0;
}
__initcall(audit_classes_init);

38
arch/powerpc/kernel/compat_audit.c Normal file
View File

@ -0,0 +1,38 @@
#undef __powerpc64__
#include <asm/unistd.h>
unsigned ppc32_dir_class[] = {
#include <asm-generic/audit_dir_write.h>
~0U
};
unsigned ppc32_chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
unsigned ppc32_write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
unsigned ppc32_read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
int ppc32_classify_syscall(unsigned syscall)
{
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 1;
}
}

4
arch/s390/kernel/Makefile
View File

@ -16,9 +16,11 @@ extra-y += head.o init_task.o vmlinux.lds
obj-$(CONFIG_MODULES) += s390_ksyms.o module.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_AUDIT) += audit.o
compat-obj-$(CONFIG_AUDIT) += compat_audit.o
obj-$(CONFIG_COMPAT) += compat_linux.o compat_signal.o \
compat_wrapper.o compat_exec_domain.o \
binfmt_elf32.o
binfmt_elf32.o $(compat-obj-y)
obj-$(CONFIG_VIRT_TIMER) += vtime.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o

66
arch/s390/kernel/audit.c Normal file
View File

@ -0,0 +1,66 @@
#include <linux/init.h>
#include <linux/types.h>
#include <linux/audit.h>
#include <asm/unistd.h>
static unsigned dir_class[] = {
#include <asm-generic/audit_dir_write.h>
~0U
};
static unsigned read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
static unsigned write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
static unsigned chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
int audit_classify_syscall(int abi, unsigned syscall)
{
#ifdef CONFIG_COMPAT
extern int s390_classify_syscall(unsigned);
if (abi == AUDIT_ARCH_S390)
return s390_classify_syscall(syscall);
#endif
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 0;
}
}
static int __init audit_classes_init(void)
{
#ifdef CONFIG_COMPAT
extern __u32 s390_dir_class[];
extern __u32 s390_write_class[];
extern __u32 s390_read_class[];
extern __u32 s390_chattr_class[];
audit_register_class(AUDIT_CLASS_WRITE_32, s390_write_class);
audit_register_class(AUDIT_CLASS_READ_32, s390_read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE_32, s390_dir_class);
audit_register_class(AUDIT_CLASS_CHATTR_32, s390_chattr_class);
#endif
audit_register_class(AUDIT_CLASS_WRITE, write_class);
audit_register_class(AUDIT_CLASS_READ, read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class);
audit_register_class(AUDIT_CLASS_CHATTR, chattr_class);
return 0;
}
__initcall(audit_classes_init);

38
arch/s390/kernel/compat_audit.c Normal file
View File

@ -0,0 +1,38 @@
#undef __s390x__
#include <asm/unistd.h>
unsigned s390_dir_class[] = {
#include <asm-generic/audit_dir_write.h>
~0U
};
unsigned s390_chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
unsigned s390_write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
unsigned s390_read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
int s390_classify_syscall(unsigned syscall)
{
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 1;
}
}

26
arch/x86_64/ia32/audit.c
View File

@ -9,3 +9,29 @@ unsigned ia32_chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
unsigned ia32_write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
unsigned ia32_read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
int ia32_classify_syscall(unsigned syscall)
{
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_socketcall:
return 4;
case __NR_execve:
return 5;
default:
return 1;
}
}

35
arch/x86_64/kernel/audit.c
View File

@ -8,19 +8,54 @@ static unsigned dir_class[] = {
~0U
};
static unsigned read_class[] = {
#include <asm-generic/audit_read.h>
~0U
};
static unsigned write_class[] = {
#include <asm-generic/audit_write.h>
~0U
};
static unsigned chattr_class[] = {
#include <asm-generic/audit_change_attr.h>
~0U
};
int audit_classify_syscall(int abi, unsigned syscall)
{
#ifdef CONFIG_IA32_EMULATION
extern int ia32_classify_syscall(unsigned);
if (abi == AUDIT_ARCH_I386)
return ia32_classify_syscall(syscall);
#endif
switch(syscall) {
case __NR_open:
return 2;
case __NR_openat:
return 3;
case __NR_execve:
return 5;
default:
return 0;
}
}
static int __init audit_classes_init(void)
{
#ifdef CONFIG_IA32_EMULATION
extern __u32 ia32_dir_class[];
extern __u32 ia32_write_class[];
extern __u32 ia32_read_class[];
extern __u32 ia32_chattr_class[];
audit_register_class(AUDIT_CLASS_WRITE_32, ia32_write_class);
audit_register_class(AUDIT_CLASS_READ_32, ia32_read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE_32, ia32_dir_class);
audit_register_class(AUDIT_CLASS_CHATTR_32, ia32_chattr_class);
#endif
audit_register_class(AUDIT_CLASS_WRITE, write_class);
audit_register_class(AUDIT_CLASS_READ, read_class);
audit_register_class(AUDIT_CLASS_DIR_WRITE, dir_class);
audit_register_class(AUDIT_CLASS_CHATTR, chattr_class);
return 0;

12
drivers/ide/pci/aec62xx.c
View File

@ -425,12 +425,12 @@ static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_devi
return d->init_setup(dev, d);
}
static const struct pci_device_id aec62xx_pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF), 0 },
{ PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860), 1 },
{ PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R), 2 },
{ PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865), 3 },
{ PCI_DEVICE(PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R), 4 },
static struct pci_device_id aec62xx_pci_tbl[] = {
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP850UF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP860R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
{ PCI_VENDOR_ID_ARTOP, PCI_DEVICE_ID_ARTOP_ATP865R, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
{ 0, },
};
MODULE_DEVICE_TABLE(pci, aec62xx_pci_tbl);

10
drivers/ide/pci/serverworks.c
View File

@ -649,11 +649,11 @@ static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device
}
static struct pci_device_id svwks_pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE), 0},
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE), 1},
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE), 2},
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2), 3},
{ PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE), 4},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
{ 0, },
};
MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);

6
drivers/ide/pci/siimage.c
View File

@ -1082,10 +1082,10 @@ static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_devi
}
static struct pci_device_id siimage_pci_tbl[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680), 0},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
#ifdef CONFIG_BLK_DEV_IDE_SATA
{ PCI_DEVICE(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112), 1},
{ PCI_DEVICE(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA), 2},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
{ PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
#endif
{ 0, },
};

69
drivers/mmc/imxmmc.c
View File

@ -91,6 +91,8 @@ struct imxmci_host {
int dma_allocated;
unsigned char actual_bus_width;
int prev_cmd_code;
};
#define IMXMCI_PEND_IRQ_b 0
@ -248,16 +250,14 @@ static void imxmci_setup_data(struct imxmci_host *host, struct mmc_data *data)
* partial FIFO fills and reads. The length has to be rounded up to burst size multiple.
* This is required for SCR read at least.
*/
if (datasz < 64) {
if (datasz < 512) {
host->dma_size = datasz;
if (data->flags & MMC_DATA_READ) {
host->dma_dir = DMA_FROM_DEVICE;
/* Hack to enable read SCR */
if(datasz < 16) {
MMC_NOB = 1;
MMC_BLK_LEN = 16;
}
MMC_NOB = 1;
MMC_BLK_LEN = 512;
} else {
host->dma_dir = DMA_TO_DEVICE;
}
@ -409,6 +409,9 @@ static void imxmci_finish_request(struct imxmci_host *host, struct mmc_request *
spin_unlock_irqrestore(&host->lock, flags);
if(req && req->cmd)
host->prev_cmd_code = req->cmd->opcode;
host->req = NULL;
host->cmd = NULL;
host->data = NULL;
@ -553,7 +556,6 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
{
int i;
int burst_len;
int flush_len;
int trans_done = 0;
unsigned int stat = *pstat;
@ -566,44 +568,43 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data running STATUS = 0x%x\n",
stat);
udelay(20); /* required for clocks < 8MHz*/
if(host->dma_dir == DMA_FROM_DEVICE) {
imxmci_busy_wait_for_status(host, &stat,
STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE,
20, "imxmci_cpu_driven_data read");
50, "imxmci_cpu_driven_data read");
while((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) &&
(host->data_cnt < host->dma_size)) {
if(burst_len >= host->dma_size - host->data_cnt) {
flush_len = burst_len;
burst_len = host->dma_size - host->data_cnt;
flush_len -= burst_len;
host->data_cnt = host->dma_size;
trans_done = 1;
} else {
flush_len = 0;
host->data_cnt += burst_len;
}
(host->data_cnt < 512)) {
udelay(20); /* required for clocks < 8MHz*/
for(i = burst_len; i>=2 ; i-=2) {
*(host->data_ptr++) = MMC_BUFFER_ACCESS;
udelay(20); /* required for clocks < 8MHz*/
u16 data;
data = MMC_BUFFER_ACCESS;
udelay(10); /* required for clocks < 8MHz*/
if(host->data_cnt+2 <= host->dma_size) {
*(host->data_ptr++) = data;
} else {
if(host->data_cnt < host->dma_size)
*(u8*)(host->data_ptr) = data;
}
host->data_cnt += 2;
}
if(i == 1)
*(u8*)(host->data_ptr) = MMC_BUFFER_ACCESS;
stat = MMC_STATUS;
/* Flush extra bytes from FIFO */
while(flush_len && !(stat & STATUS_DATA_TRANS_DONE)){
i = MMC_BUFFER_ACCESS;
stat = MMC_STATUS;
stat &= ~STATUS_CRC_READ_ERR; /* Stupid but required there */
}
dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read burst %d STATUS = 0x%x\n",
burst_len, stat);
dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read %d burst %d STATUS = 0x%x\n",
host->data_cnt, burst_len, stat);
}
if((stat & STATUS_DATA_TRANS_DONE) && (host->data_cnt >= 512))
trans_done = 1;
if(host->dma_size & 0x1ff)
stat &= ~STATUS_CRC_READ_ERR;
} else {
imxmci_busy_wait_for_status(host, &stat,
STATUS_APPL_BUFF_FE,
@ -692,8 +693,8 @@ static void imxmci_tasklet_fnc(unsigned long data)
what, stat, MMC_INT_MASK);
dev_err(mmc_dev(host->mmc), "CMD_DAT_CONT = 0x%04x, MMC_BLK_LEN = 0x%04x, MMC_NOB = 0x%04x, DMA_CCR = 0x%08x\n",
MMC_CMD_DAT_CONT, MMC_BLK_LEN, MMC_NOB, CCR(host->dma));
dev_err(mmc_dev(host->mmc), "CMD%d, bus %d-bit, dma_size = 0x%x\n",
host->cmd?host->cmd->opcode:0, 1<<host->actual_bus_width, host->dma_size);
dev_err(mmc_dev(host->mmc), "CMD%d, prevCMD%d, bus %d-bit, dma_size = 0x%x\n",
host->cmd?host->cmd->opcode:0, host->prev_cmd_code, 1<<host->actual_bus_width, host->dma_size);
}
if(!host->present || timeout)

55
drivers/mmc/mmc.c
View File

@ -247,6 +247,55 @@ int mmc_wait_for_app_cmd(struct mmc_host *host, unsigned int rca,
EXPORT_SYMBOL(mmc_wait_for_app_cmd);
/**
* mmc_set_data_timeout - set the timeout for a data command
* @data: data phase for command
* @card: the MMC card associated with the data transfer
* @write: flag to differentiate reads from writes
*/
void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card,
int write)
{
unsigned int mult;
/*
* SD cards use a 100 multiplier rather than 10
*/
mult = mmc_card_sd(card) ? 100 : 10;
/*
* Scale up the multiplier (and therefore the timeout) by
* the r2w factor for writes.
*/
if (write)
mult <<= card->csd.r2w_factor;
data->timeout_ns = card->csd.tacc_ns * mult;
data->timeout_clks = card->csd.tacc_clks * mult;
/*
* SD cards also have an upper limit on the timeout.
*/
if (mmc_card_sd(card)) {
unsigned int timeout_us, limit_us;
timeout_us = data->timeout_ns / 1000;
timeout_us += data->timeout_clks * 1000 /
(card->host->ios.clock / 1000);
if (write)
limit_us = 250000;
else
limit_us = 100000;
if (timeout_us > limit_us) {
data->timeout_ns = limit_us * 1000;
data->timeout_clks = 0;
}
}
}
EXPORT_SYMBOL(mmc_set_data_timeout);
static int mmc_select_card(struct mmc_host *host, struct mmc_card *card);
/**
@ -908,11 +957,9 @@ static void mmc_read_scrs(struct mmc_host *host)
{
int err;
struct mmc_card *card;
struct mmc_request mrq;
struct mmc_command cmd;
struct mmc_data data;
struct scatterlist sg;
list_for_each_entry(card, &host->cards, node) {
@ -947,8 +994,8 @@ static void mmc_read_scrs(struct mmc_host *host)
memset(&data, 0, sizeof(struct mmc_data));
data.timeout_ns = card->csd.tacc_ns * 10;
data.timeout_clks = card->csd.tacc_clks * 10;
mmc_set_data_timeout(&data, card, 0);
data.blksz_bits = 3;
data.blksz = 1 << 3;
data.blocks = 1;

60
drivers/mmc/mmc_block.c
View File

@ -30,6 +30,7 @@
#include <linux/mutex.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
#include <linux/mmc/protocol.h>
#include <asm/system.h>
@ -171,8 +172,6 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
brq.cmd.arg = req->sector << 9;
brq.cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC;
brq.data.timeout_ns = card->csd.tacc_ns * 10;
brq.data.timeout_clks = card->csd.tacc_clks * 10;
brq.data.blksz_bits = md->block_bits;
brq.data.blksz = 1 << md->block_bits;
brq.data.blocks = req->nr_sectors >> (md->block_bits - 9);
@ -180,6 +179,8 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
brq.stop.arg = 0;
brq.stop.flags = MMC_RSP_R1B | MMC_CMD_AC;
mmc_set_data_timeout(&brq.data, card, rq_data_dir(req) != READ);
if (rq_data_dir(req) == READ) {
brq.cmd.opcode = brq.data.blocks > 1 ? MMC_READ_MULTIPLE_BLOCK : MMC_READ_SINGLE_BLOCK;
brq.data.flags |= MMC_DATA_READ;
@ -187,12 +188,6 @@ static int mmc_blk_issue_rq(struct mmc_queue *mq, struct request *req)
brq.cmd.opcode = MMC_WRITE_BLOCK;
brq.data.flags |= MMC_DATA_WRITE;
brq.data.blocks = 1;
/*
* Scale up the timeout by the r2w factor
*/
brq.data.timeout_ns <<= card->csd.r2w_factor;
brq.data.timeout_clks <<= card->csd.r2w_factor;
}
if (brq.data.blocks > 1) {
@ -324,52 +319,11 @@ static struct mmc_blk_data *mmc_blk_alloc(struct mmc_card *card)
md->read_only = mmc_blk_readonly(card);
/*
* Figure out a workable block size. MMC cards have:
* - two block sizes, one for read and one for write.
* - may support partial reads and/or writes
* (allows block sizes smaller than specified)
* Both SD and MMC specifications state (although a bit
* unclearly in the MMC case) that a block size of 512
* bytes must always be supported by the card.
*/
md->block_bits = card->csd.read_blkbits;
if (card->csd.write_blkbits != card->csd.read_blkbits) {
if (card->csd.write_blkbits < card->csd.read_blkbits &&
card->csd.read_partial) {
/*
* write block size is smaller than read block
* size, but we support partial reads, so choose
* the smaller write block size.
*/
md->block_bits = card->csd.write_blkbits;
} else if (card->csd.write_blkbits > card->csd.read_blkbits &&
card->csd.write_partial) {
/*
* read block size is smaller than write block
* size, but we support partial writes. Use read
* block size.
*/
} else {
/*
* We don't support this configuration for writes.
*/
printk(KERN_ERR "%s: unable to select block size for "
"writing (rb%u wb%u rp%u wp%u)\n",
mmc_card_id(card),
1 << card->csd.read_blkbits,
1 << card->csd.write_blkbits,
card->csd.read_partial,
card->csd.write_partial);
md->read_only = 1;
}
}
/*
* Refuse to allow block sizes smaller than 512 bytes.
*/
if (md->block_bits < 9) {
printk(KERN_ERR "%s: unable to support block size %u\n",
mmc_card_id(card), 1 << md->block_bits);
ret = -EINVAL;
goto err_kfree;
}
md->block_bits = 9;
md->disk = alloc_disk(1 << MMC_SHIFT);
if (md->disk == NULL) {

61
drivers/net/wireless/zd1211rw/zd_chip.c
View File

@ -1435,9 +1435,43 @@ static int ofdm_qual_db(u8 status_quality, u8 rate, unsigned int size)
break;
}
switch (rate) {
case ZD_OFDM_RATE_6M:
case ZD_OFDM_RATE_9M:
i += 3;
break;
case ZD_OFDM_RATE_12M:
case ZD_OFDM_RATE_18M:
i += 5;
break;
case ZD_OFDM_RATE_24M:
case ZD_OFDM_RATE_36M:
i += 9;
break;
case ZD_OFDM_RATE_48M:
case ZD_OFDM_RATE_54M:
i += 15;
break;
default:
return -EINVAL;
}
return i;
}
static int ofdm_qual_percent(u8 status_quality, u8 rate, unsigned int size)
{
int r;
r = ofdm_qual_db(status_quality, rate, size);
ZD_ASSERT(r >= 0);
if (r < 0)
r = 0;
r = (r * 100)/29;
return r <= 100 ? r : 100;
}
static unsigned int log10times100(unsigned int x)
{
static const u8 log10[] = {
@ -1481,31 +1515,28 @@ static int cck_snr_db(u8 status_quality)
return r;
}
static int rx_qual_db(const void *rx_frame, unsigned int size,
const struct rx_status *status)
static int cck_qual_percent(u8 status_quality)
{
return (status->frame_status&ZD_RX_OFDM) ?
ofdm_qual_db(status->signal_quality_ofdm,
zd_ofdm_plcp_header_rate(rx_frame),
size) :
cck_snr_db(status->signal_quality_cck);
int r;
r = cck_snr_db(status_quality);
r = (100*r)/17;
return r <= 100 ? r : 100;
}
u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
const struct rx_status *status)
{
int r = rx_qual_db(rx_frame, size, status);
if (r < 0)
r = 0;
r = (r * 100) / 14;
if (r > 100)
r = 100;
return r;
return (status->frame_status&ZD_RX_OFDM) ?
ofdm_qual_percent(status->signal_quality_ofdm,
zd_ofdm_plcp_header_rate(rx_frame),
size) :
cck_qual_percent(status->signal_quality_cck);
}
u8 zd_rx_strength_percent(u8 rssi)
{
int r = (rssi*100) / 30;
int r = (rssi*100) / 41;
if (r > 100)
r = 100;
return (u8) r;

43
drivers/net/wireless/zd1211rw/zd_mac.c
View File

@ -814,13 +814,25 @@ static int filter_rx(struct ieee80211_device *ieee,
return -EINVAL;
}
static void update_qual_rssi(struct zd_mac *mac, u8 qual_percent, u8 rssi)
static void update_qual_rssi(struct zd_mac *mac,
const u8 *buffer, unsigned int length,
u8 qual_percent, u8 rssi_percent)
{
unsigned long flags;
struct ieee80211_hdr_3addr *hdr;
int i;
hdr = (struct ieee80211_hdr_3addr *)buffer;
if (length < offsetof(struct ieee80211_hdr_3addr, addr3))
return;
if (memcmp(hdr->addr2, zd_mac_to_ieee80211(mac)->bssid, ETH_ALEN) != 0)
return;
spin_lock_irqsave(&mac->lock, flags);
mac->qual_average = (7 * mac->qual_average + qual_percent) / 8;
mac->rssi_average = (7 * mac->rssi_average + rssi) / 8;
i = mac->stats_count % ZD_MAC_STATS_BUFFER_SIZE;
mac->qual_buffer[i] = qual_percent;
mac->rssi_buffer[i] = rssi_percent;
mac->stats_count++;
spin_unlock_irqrestore(&mac->lock, flags);
}
@ -851,7 +863,6 @@ static int fill_rx_stats(struct ieee80211_rx_stats *stats,
if (stats->rate)
stats->mask |= IEEE80211_STATMASK_RATE;
update_qual_rssi(mac, stats->signal, stats->rssi);
return 0;
}
@ -875,6 +886,8 @@ int zd_mac_rx(struct zd_mac *mac, const u8 *buffer, unsigned int length)
sizeof(struct rx_status);
buffer += ZD_PLCP_HEADER_SIZE;
update_qual_rssi(mac, buffer, length, stats.signal, stats.rssi);
r = filter_rx(ieee, buffer, length, &stats);
if (r <= 0)
return r;
@ -979,17 +992,31 @@ struct iw_statistics *zd_mac_get_wireless_stats(struct net_device *ndev)
{
struct zd_mac *mac = zd_netdev_mac(ndev);
struct iw_statistics *iw_stats = &mac->iw_stats;
unsigned int i, count, qual_total, rssi_total;
memset(iw_stats, 0, sizeof(struct iw_statistics));
/* We are not setting the status, because ieee->state is not updated
* at all and this driver doesn't track authentication state.
*/
spin_lock_irq(&mac->lock);
iw_stats->qual.qual = mac->qual_average;
iw_stats->qual.level = mac->rssi_average;
iw_stats->qual.updated = IW_QUAL_QUAL_UPDATED|IW_QUAL_LEVEL_UPDATED|
IW_QUAL_NOISE_INVALID;
count = mac->stats_count < ZD_MAC_STATS_BUFFER_SIZE ?
mac->stats_count : ZD_MAC_STATS_BUFFER_SIZE;
qual_total = rssi_total = 0;
for (i = 0; i < count; i++) {
qual_total += mac->qual_buffer[i];
rssi_total += mac->rssi_buffer[i];
}
spin_unlock_irq(&mac->lock);
iw_stats->qual.updated = IW_QUAL_NOISE_INVALID;
if (count > 0) {
iw_stats->qual.qual = qual_total / count;
iw_stats->qual.level = rssi_total / count;
iw_stats->qual.updated |=
IW_QUAL_QUAL_UPDATED|IW_QUAL_LEVEL_UPDATED;
} else {
iw_stats->qual.updated |=
IW_QUAL_QUAL_INVALID|IW_QUAL_LEVEL_INVALID;
}
/* TODO: update counter */
return iw_stats;
}

11
drivers/net/wireless/zd1211rw/zd_mac.h
View File

@ -1,4 +1,4 @@
/* zd_mac.c
/* zd_mac.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -87,9 +87,9 @@ struct rx_length_info {
#define RX_LENGTH_INFO_TAG 0x697e
struct rx_status {
u8 signal_quality_cck;
/* rssi */
u8 signal_strength;
u8 signal_quality_cck;
u8 signal_quality_ofdm;
u8 decryption_type;
u8 frame_status;
@ -120,14 +120,17 @@ enum mac_flags {
MAC_FIXED_CHANNEL = 0x01,
};
#define ZD_MAC_STATS_BUFFER_SIZE 16
struct zd_mac {
struct zd_chip chip;
spinlock_t lock;
struct net_device *netdev;
/* Unlocked reading possible */
struct iw_statistics iw_stats;
u8 qual_average;
u8 rssi_average;
unsigned int stats_count;
u8 qual_buffer[ZD_MAC_STATS_BUFFER_SIZE];
u8 rssi_buffer[ZD_MAC_STATS_BUFFER_SIZE];
u8 regdomain;
u8 default_regdomain;
u8 requested_channel;

36
drivers/scsi/ata_piix.c
View File

@ -123,7 +123,8 @@ enum {
ich6_sata = 4,
ich6_sata_ahci = 5,
ich6m_sata_ahci = 6,
ich8_sata_ahci = 7,
ich7m_sata_ahci = 7,
ich8_sata_ahci = 8,
/* constants for mapping table */
P0 = 0, /* port 0 */
@ -188,7 +189,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
/* 82801GB/GR/GH (ICH7, identical to ICH6) */
{ 0x8086, 0x27c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
/* 2801GBM/GHM (ICH7M, identical to ICH6M) */
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6m_sata_ahci },
{ 0x8086, 0x27c4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich7m_sata_ahci },
/* Enterprise Southbridge 2 (where's the datasheet?) */
{ 0x8086, 0x2680, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich6_sata_ahci },
/* SATA Controller 1 IDE (ICH8, no datasheet yet) */
@ -336,6 +337,24 @@ static const struct piix_map_db ich6m_map_db = {
},
};
static const struct piix_map_db ich7m_map_db = {
.mask = 0x3,
.port_enable = 0x5,
.present_shift = 4,
/* Map 01b isn't specified in the doc but some notebooks use
* it anyway. ATM, the only case spotted carries subsystem ID
* 1025:0107. This is the only difference from ich6m.
*/
.map = {
/* PM PS SM SS MAP */
{ P0, P2, RV, RV }, /* 00b */
{ IDE, IDE, P1, P3 }, /* 01b */
{ P0, P2, IDE, IDE }, /* 10b */
{ RV, RV, RV, RV },
},
};
static const struct piix_map_db ich8_map_db = {
.mask = 0x3,
.port_enable = 0x3,
@ -355,6 +374,7 @@ static const struct piix_map_db *piix_map_db_table[] = {
[ich6_sata] = &ich6_map_db,
[ich6_sata_ahci] = &ich6_map_db,
[ich6m_sata_ahci] = &ich6m_map_db,
[ich7m_sata_ahci] = &ich7m_map_db,
[ich8_sata_ahci] = &ich8_map_db,
};
@ -444,6 +464,18 @@ static struct ata_port_info piix_port_info[] = {
.port_ops = &piix_sata_ops,
},
/* ich7m_sata_ahci */
{
.sht = &piix_sht,
.host_flags = ATA_FLAG_SATA |
PIIX_FLAG_CHECKINTR | PIIX_FLAG_SCR |
PIIX_FLAG_AHCI,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 */
.port_ops = &piix_sata_ops,
},
/* ich8_sata_ahci */
{
.sht = &piix_sht,

3
drivers/scsi/sata_mv.c
View File

@ -1961,8 +1961,7 @@ static void __mv_phy_reset(struct ata_port *ap, int can_sleep)
timeout = jiffies + msecs_to_jiffies(200);
do {
sata_scr_read(ap, SCR_STATUS, &sstatus);
sstatus &= 0x3;
if ((sstatus == 3) || (sstatus == 0))
if (((sstatus & 0x3) == 3) || ((sstatus & 0x3) == 0))
break;
__msleep(1, can_sleep);

1
drivers/scsi/sata_via.c
View File

@ -77,6 +77,7 @@ static void svia_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
static void vt6420_error_handler(struct ata_port *ap);
static const struct pci_device_id svia_pci_tbl[] = {
{ 0x1106, 0x0591, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6420 },
{ 0x1106, 0x3149, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6420 },
{ 0x1106, 0x3249, PCI_ANY_ID, PCI_ANY_ID, 0, 0, vt6421 },

4
drivers/usb/input/hid-core.c
View File

@ -1444,7 +1444,7 @@ void hid_init_reports(struct hid_device *hid)
#define USB_DEVICE_ID_GTCO_402 0x0402
#define USB_DEVICE_ID_GTCO_403 0x0403
#define USB_DEVICE_ID_GTCO_404 0x0404
#define USB_DEVICE_ID_GTCO_404 0x0405
#define USB_DEVICE_ID_GTCO_405 0x0405
#define USB_DEVICE_ID_GTCO_500 0x0500
#define USB_DEVICE_ID_GTCO_501 0x0501
#define USB_DEVICE_ID_GTCO_502 0x0502
@ -1657,7 +1657,7 @@ static const struct hid_blacklist {
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_402, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_403, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_404, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_404, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_405, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_500, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_501, HID_QUIRK_IGNORE },
{ USB_VENDOR_ID_GTCO, USB_DEVICE_ID_GTCO_502, HID_QUIRK_IGNORE },

2
drivers/usb/input/usbtouchscreen.c
View File

@ -286,7 +286,7 @@ static int mtouch_init(struct usbtouch_usb *usbtouch)
static int itm_read_data(unsigned char *pkt, int *x, int *y, int *touch, int *press)
{
*x = ((pkt[0] & 0x1F) << 7) | (pkt[3] & 0x7F);
*x = ((pkt[1] & 0x1F) << 7) | (pkt[4] & 0x7F);
*y = ((pkt[1] & 0x1F) << 7) | (pkt[4] & 0x7F);
*press = ((pkt[2] & 0x1F) << 7) | (pkt[5] & 0x7F);
*touch = ~pkt[7] & 0x20;

2
drivers/usb/misc/sisusbvga/sisusb.c
View File

@ -3435,6 +3435,8 @@ static void sisusb_disconnect(struct usb_interface *intf)
static struct usb_device_id sisusb_table [] = {
{ USB_DEVICE(0x0711, 0x0900) },
{ USB_DEVICE(0x0711, 0x0901) },
{ USB_DEVICE(0x0711, 0x0902) },
{ USB_DEVICE(0x182d, 0x021c) },
{ USB_DEVICE(0x182d, 0x0269) },
{ }

1
drivers/usb/serial/ftdi_sio.c
View File

@ -506,6 +506,7 @@ static struct usb_device_id id_table_combined [] = {
{ USB_DEVICE(FTDI_VID, FTDI_YEI_SERVOCENTER31_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_THORLABS_PID) },
{ USB_DEVICE(TESTO_VID, TESTO_USB_INTERFACE_PID) },
{ USB_DEVICE(FTDI_VID, FTDI_GAMMA_SCOUT_PID) },
{ }, /* Optional parameter entry */
{ } /* Terminating entry */
};

5
drivers/usb/serial/ftdi_sio.h
View File

@ -467,6 +467,11 @@
#define TESTO_VID 0x128D
#define TESTO_USB_INTERFACE_PID 0x0001
/*
* Gamma Scout (http://gamma-scout.com/). Submitted by rsc@runtux.com.
*/
#define FTDI_GAMMA_SCOUT_PID 0xD678 /* Gamma Scout online */
/* Commands */
#define FTDI_SIO_RESET 0 /* Reset the port */
#define FTDI_SIO_MODEM_CTRL 1 /* Set the modem control register */

3
include/asm-arm/arch-s3c2410/anubis-cpld.h
View File

@ -9,9 +9,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
*
*/
#ifndef __ASM_ARCH_ANUBISCPLD_H

4
include/asm-arm/arch-s3c2410/anubis-irq.h
View File

@ -9,9 +9,7 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
*/
*/
#ifndef __ASM_ARCH_ANUBISIRQ_H
#define __ASM_ARCH_ANUBISIRQ_H

2
include/asm-arm/arch-s3c2410/anubis-map.h
View File

@ -9,8 +9,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
*/
/* needs arch/map.h including with this */

4
include/asm-arm/arch-s3c2410/audio.h
View File

@ -9,10 +9,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 20-Nov-2004 BJD Created file
* 07-Mar-2005 BJD Added suspend/resume calls
*/
#ifndef __ASM_ARCH_AUDIO_H

5
include/asm-arm/arch-s3c2410/bast-cpld.h
View File

@ -8,11 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 25-May-2003 BJD Created file, added CTRL1 registers
* 30-Aug-2004 BJD Updated definitions from 2.4.26 port
* 30-Aug-2004 BJD Added CTRL3 and CTRL4 definitions
*/
#ifndef __ASM_ARCH_BASTCPLD_H

6
include/asm-arm/arch-s3c2410/bast-irq.h
View File

@ -8,11 +8,7 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 14-Sep-2004 BJD Fixed IRQ_USBOC definition
* 06-Jan-2003 BJD Linux 2.6.0 version
*/
*/
#ifndef __ASM_ARCH_BASTIRQ_H
#define __ASM_ARCH_BASTIRQ_H

4
include/asm-arm/arch-s3c2410/bast-map.h
View File

@ -8,10 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics from arch/map.h
* 12-Mar-2004 BJD Fixed header include protection
*/
/* needs arch/map.h including with this */

3
include/asm-arm/arch-s3c2410/bast-pmu.h
View File

@ -9,9 +9,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 08-Oct-2003 BJD Initial creation
*/
#ifndef __ASM_ARCH_BASTPMU_H

3
include/asm-arm/arch-s3c2410/debug-macro.S
View File

@ -10,9 +10,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
#include <asm/arch/map.h>

7
include/asm-arm/arch-s3c2410/fb.h
View File

@ -7,13 +7,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*
* Changelog:
* 07-Sep-2004 RTP Created file
* 03-Nov-2004 BJD Updated and minor cleanups
* 03-Aug-2005 RTP Renamed to fb.h
* 26-Oct-2005 BJD Changed name of platdata init
*/
#ifndef __ASM_ARM_FB_H

10
include/asm-arm/arch-s3c2410/hardware.h
View File

@ -8,16 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 21-May-2003 BJD Created file
* 06-Jun-2003 BJD Added CPU frequency settings
* 03-Sep-2003 BJD Linux v2.6 support
* 12-Mar-2004 BJD Fixed include protection, fixed type of clock vars
* 14-Sep-2004 BJD Added misccr and getpin to gpio
* 01-Oct-2004 BJD Added the new gpio functions
* 16-Oct-2004 BJD Removed the clock variables
* 15-Jan-2006 LCVR Added s3c2400_gpio_getirq()
*/
#ifndef __ASM_ARCH_HARDWARE_H

4
include/asm-arm/arch-s3c2410/idle.h
View File

@ -8,10 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 CPU Idle controls
*
* Changelog:
* 28-Oct-2004 BJD Initial version
*
*/
#ifndef __ASM_ARCH_IDLE_H

4
include/asm-arm/arch-s3c2410/iic.h
View File

@ -8,10 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 05-Oct-2004 BJD Created file
* 19-Oct-2004 BJD Updated for s3c2440
*/
#ifndef __ASM_ARCH_IIC_H

8
include/asm-arm/arch-s3c2410/io.h
View File

@ -4,13 +4,7 @@
*
* Copyright (C) 1997 Russell King
* (C) 2003 Simtec Electronics
*
* Modifications:
* 06-Dec-1997 RMK Created.
* 02-Sep-2003 BJD Modified for S3C2410
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 13-Oct-2005 BJD Fixed problems with LDRH/STRH offset range
*/
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H

9
include/asm-arm/arch-s3c2410/irqs.h
View File

@ -6,14 +6,7 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 12-May-2003 BJD Created file
* 08-Jan-2003 BJD Linux 2.6.0 version, moved BAST bits out
* 12-Mar-2004 BJD Fixed bug in header protection
* 10-Feb-2005 BJD Added camera IRQ from guillaume.gourat@nexvision.tv
* 28-Feb-2005 BJD Updated s3c2440 IRQs
*/
*/
#ifndef __ASM_ARCH_IRQS_H

7
include/asm-arm/arch-s3c2410/map.h
View File

@ -8,13 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 12-May-2003 BJD Created file
* 06-Jan-2003 BJD Linux 2.6.0 version, moved bast specifics out
* 10-Feb-2005 BJD Added CAMIF definition from guillaume.gourat@nexvision.tv
* 10-Mar-2005 LCVR Added support to S3C2400, changed {VA,SZ} names
* 15-Jan-2006 LCVR Added S3C24XX_PA macros for common S3C24XX resources
*/
#ifndef __ASM_ARCH_MAP_H

14
include/asm-arm/arch-s3c2410/memory.h
View File

@ -1,6 +1,4 @@
/*
* linux/include/asm-arm/arch-s3c2410/memory.h
*
/* linux/include/asm-arm/arch-s3c2410/memory.h
* from linux/include/asm-arm/arch-rpc/memory.h
*
* Copyright (C) 1996,1997,1998 Russell King.
@ -8,16 +6,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 20-Oct-1996 RMK Created
* 31-Dec-1997 RMK Fixed definitions to reduce warnings
* 11-Jan-1998 RMK Uninlined to reduce hits on cache
* 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
* 21-Mar-1999 RMK Renamed to memory.h
* RMK Added TASK_SIZE and PAGE_OFFSET
* 05-Apr-2004 BJD Copied and altered for arch-s3c2410
* 17-Mar-2005 LCVR Modified for S3C2400
*/
#ifndef __ASM_ARCH_MEMORY_H

3
include/asm-arm/arch-s3c2410/nand.h
View File

@ -8,9 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 23-Sep-2004 BJD Created file
*/
/* struct s3c2410_nand_set

2
include/asm-arm/arch-s3c2410/osiris-map.h
View File

@ -9,8 +9,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
*/
/* needs arch/map.h including with this */

3
include/asm-arm/arch-s3c2410/regs-adc.h
View File

@ -7,9 +7,6 @@
* published by the Free Software Foundation.
*
* S3C2410 ADC registers
*
* Changelog:
* 27-09-2004 SAH Created file
*/
#ifndef __ASM_ARCH_REGS_ADC_H

12
include/asm-arm/arch-s3c2410/regs-clock.h
View File

@ -8,18 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 clock register definitions
*
* Changelog:
* 18-Aug-2004 Ben Dooks Added 2440 definitions
* 08-Aug-2004 Herbert Pötzl Added CLKCON definitions
* 19-06-2003 Ben Dooks Created file
* 12-03-2004 Ben Dooks Updated include protection
* 29-Sep-2004 Ben Dooks Fixed usage for assembly inclusion
* 10-Feb-2005 Ben Dooks Fixed CAMDIVN address (Guillaume Gourat)
* 10-Mar-2005 Lucas Villa Real Changed S3C2410_VA to S3C24XX_VA
* 27-Aug-2005 Ben Dooks Add clock-slow info
* 20-Oct-2005 Ben Dooks Fixed overflow in PLL (Guillaume Gourat)
* 20-Oct-2005 Ben Dooks Add masks for DCLK (Guillaume Gourat)
*/
#ifndef __ASM_ARM_REGS_CLOCK

15
include/asm-arm/arch-s3c2410/regs-gpio.h
View File

@ -8,21 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 GPIO register definitions
*
* Changelog:
* 19-06-2003 BJD Created file
* 23-06-2003 BJD Updated GSTATUS registers
* 12-03-2004 BJD Updated include protection
* 20-07-2004 BJD Added GPIO pin numbers, added Port A definitions
* 04-10-2004 BJD Fixed number of bugs, added EXT IRQ filter defs
* 17-10-2004 BJD Added GSTATUS1 register definitions
* 18-11-2004 BJD Fixed definitions of GPE3, GPE4, GPE5 and GPE6
* 18-11-2004 BJD Added S3C2440 AC97 controls
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 28-Mar-2005 LCVR Fixed definition of GPB10
* 26-Oct-2005 BJD Added generic configuration types
* 27-Nov-2005 LCVR Added definitions to S3C2400 registers
* 15-Jan-2006 LCVR Written S3C24XX_GPIO_BASE() macro
*/

4
include/asm-arm/arch-s3c2410/regs-gpioj.h
View File

@ -8,10 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2440 GPIO J register definitions
*
* Changelog:
* 11-Aug-2004 BJD Created file
* 10-Feb-2005 BJD Fix GPJ12 definition (Guillaume Gourat)
*/

4
include/asm-arm/arch-s3c2410/regs-iic.h
View File

@ -8,10 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 I2C Controller
*
* Changelog:
* 03-Oct-2004 BJD Initial include for Linux
* 08-Nov-2004 BJD Added S3C2440 filter register
*/
#ifndef __ASM_ARCH_REGS_IIC_H

12
include/asm-arm/arch-s3c2410/regs-iis.h
View File

@ -8,17 +8,7 @@
* published by the Free Software Foundation.
*
* S3C2410 IIS register definition
*
* Changelog:
* 19-06-2003 BJD Created file
* 26-06-2003 BJD Finished off definitions for register addresses
* 12-03-2004 BJD Updated include protection
* 07-03-2005 BJD Added FIFO size flags and S3C2440 MPLL
* 05-04-2005 LCVR Added IISFCON definitions for the S3C2400
* 18-07-2005 DA Change IISCON_MPLL to IISMOD_MPLL
* Correct IISMOD_256FS and IISMOD_384FS
* Add IISCON_PSCEN
*/
*/
#ifndef __ASM_ARCH_REGS_IIS_H
#define __ASM_ARCH_REGS_IIS_H

9
include/asm-arm/arch-s3c2410/regs-irq.h
View File

@ -6,14 +6,7 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*
*
* Changelog:
* 19-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/
*/
#ifndef ___ASM_ARCH_REGS_IRQ_H

8
include/asm-arm/arch-s3c2410/regs-lcd.h
View File

@ -6,14 +6,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*
*
* Changelog:
* 12-06-2003 BJD Created file
* 26-06-2003 BJD Updated LCDCON register definitions
* 12-03-2004 BJD Updated include protection
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/

6
include/asm-arm/arch-s3c2410/regs-mem.h
View File

@ -8,12 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 Memory Control register definitions
*
* Changelog:
* 29-Sep-2004 BJD Initial include for Linux
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 04-Apr-2005 LCVR Added S3C2400 DRAM/BANKSIZE_MASK definitions
*
*/
#ifndef __ASM_ARM_MEMREGS_H

4
include/asm-arm/arch-s3c2410/regs-nand.h
View File

@ -8,10 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 NAND register definitions
*
* Changelog:
* 18-Aug-2004 BJD Copied file from 2.4 and updated
* 01-May-2005 BJD Added definitions for s3c2440 controller
*/
#ifndef __ASM_ARM_REGS_NAND

5
include/asm-arm/arch-s3c2410/regs-rtc.h
View File

@ -8,11 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 Internal RTC register definition
*
* Changelog:
* 19-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
* 15-01-2005 LCVR Changed S3C2410_VA to S3C24XX_VA (s3c2400 support)
*/
#ifndef __ASM_ARCH_REGS_RTC_H

5
include/asm-arm/arch-s3c2410/regs-sdi.h
View File

@ -8,11 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 MMC/SDIO register definitions
*
* Changelog:
* 18-Aug-2004 Ben Dooks Created initial file
* 29-Nov-2004 Koen Martens Added some missing defines, fixed duplicates
* 29-Nov-2004 Ben Dooks Updated Koen's patch
*/
#ifndef __ASM_ARM_REGS_SDI

5
include/asm-arm/arch-s3c2410/regs-serial.h
View File

@ -27,10 +27,7 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Modifications:
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA (s3c2400 support)
*/
*/
#ifndef __ASM_ARM_REGS_SERIAL_H
#define __ASM_ARM_REGS_SERIAL_H

8
include/asm-arm/arch-s3c2410/regs-spi.h
View File

@ -7,13 +7,7 @@
* published by the Free Software Foundation.
*
* S3C2410 SPI register definition
*
* Changelog:
* 20-04-2004 KF Created file
* 04-10-2004 BJD Removed VA address (no longer mapped)
* tidied file for submission
* 03-04-2005 LCVR Added S3C2400_SPPIN_nCS definition
*/
*/
#ifndef __ASM_ARCH_REGS_SPI_H
#define __ASM_ARCH_REGS_SPI_H

7
include/asm-arm/arch-s3c2410/regs-timer.h
View File

@ -8,13 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 Timer configuration
*
* Changelog:
* 05-06-2003 BJD Created file
* 26-06-2003 BJD Added more timer definitions to mux / control
* 12-03-2004 BJD Updated include protection
* 10-02-2005 BJD Added S3C2410_TCFG1_MUX4_SHIFT (Guillaume Gourat)
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/

8
include/asm-arm/arch-s3c2410/regs-udc.h
View File

@ -6,13 +6,7 @@
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* Changelog:
* 01-08-2004 Initial creation
* 12-09-2004 Cleanup for submission
* 24-10-2004 Fixed S3C2410_UDC_MAXP_REG definition
* 10-03-2005 Changed S3C2410_VA to S3C24XX_VA
*/
*/
#ifndef __ASM_ARCH_REGS_UDC_H
#define __ASM_ARCH_REGS_UDC_H

7
include/asm-arm/arch-s3c2410/regs-watchdog.h
View File

@ -1,4 +1,4 @@
/* linux/include/asm/arch-s3c2410/regs0watchdog.h
/* linux/include/asm/arch-s3c2410/regs-watchdog.h
*
* Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
* http://www.simtec.co.uk/products/SWLINUX/
@ -8,11 +8,6 @@
* published by the Free Software Foundation.
*
* S3C2410 Watchdog timer control
*
* Changelog:
* 21-06-2003 BJD Created file
* 12-03-2004 BJD Updated include protection
* 10-03-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
*/

9
include/asm-arm/arch-s3c2410/system.h
View File

@ -8,14 +8,7 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 12-May-2003 BJD Created file
* 14-May-2003 BJD Removed idle to aid debugging
* 12-Jun-2003 BJD Added reset via watchdog
* 04-Sep-2003 BJD Moved to v2.6
* 28-Oct-2004 BJD Added over-ride for idle, and fixed reset panic()
*/
*/
#include <asm/hardware.h>
#include <asm/io.h>

6
include/asm-arm/arch-s3c2410/timex.h
View File

@ -8,12 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 02-Sep-2003 BJD Created file
* 05-Jan-2004 BJD Updated for Linux 2.6.0
* 22-Nov-2004 BJD Fixed CLOCK_TICK_RATE
* 10-Jan-2004 BJD Removed s3c2410_clock_tick_rate
*/
#ifndef __ASM_ARCH_TIMEX_H

9
include/asm-arm/arch-s3c2410/uncompress.h
View File

@ -8,15 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 22-May-2003 BJD Created
* 08-Sep-2003 BJD Moved to linux v2.6
* 12-Mar-2004 BJD Updated header protection
* 12-Oct-2004 BJD Take account of debug uart configuration
* 15-Nov-2004 BJD Fixed uart configuration
* 22-Feb-2005 BJD Added watchdog to uncompress
* 04-Apr-2005 LCVR Added support to S3C2400 (no cpuid at GSTATUS1)
*/
#ifndef __ASM_ARCH_UNCOMPRESS_H

5
include/asm-arm/arch-s3c2410/usb-control.h
View File

@ -8,11 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 11-Sep-2004 BJD Created file
* 21-Sep-2004 BJD Updated port info
* 09-Aug-2005 BJD Renamed s3c2410_report_oc s3c2410_usb_report_oc
*/
#ifndef __ASM_ARCH_USBCONTROL_H

6
include/asm-arm/arch-s3c2410/vmalloc.h
View File

@ -10,11 +10,7 @@
* published by the Free Software Foundation.
*
* S3C2410 vmalloc definition
*
* Changelog:
* 12-Mar-2004 BJD Fixed header, added include protection
* 12=Mar-2004 BJD Fixed VMALLOC_END definitions
*/
*/
#ifndef __ASM_ARCH_VMALLOC_H
#define __ASM_ARCH_VMALLOC_H

4
include/asm-arm/arch-s3c2410/vr1000-cpld.h
View File

@ -8,10 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 25-May-2003 BJD Created file, added CTRL1 registers
* 19-Mar-2004 BJD Added VR1000 CPLD definitions
*/
#ifndef __ASM_ARCH_VR1000CPLD_H

6
include/asm-arm/arch-s3c2410/vr1000-irq.h
View File

@ -8,11 +8,7 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 06-Jan-2003 BJD Linux 2.6.0 version
* 19-Mar-2004 BJD Updates for VR1000
*/
*/
#ifndef __ASM_ARCH_VR1000IRQ_H
#define __ASM_ARCH_VR1000IRQ_H

6
include/asm-arm/arch-s3c2410/vr1000-map.h
View File

@ -8,12 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 06-Jan-2003 BJD Linux 2.6.0 version, split specifics from arch/map.h
* 12-Mar-2004 BJD Fixed header include protection
* 19-Mar-2004 BJD Copied to VR1000 machine headers.
* 19-Jan-2005 BJD Updated map definitions
*/
/* needs arch/map.h including with this */

2
include/asm-arm/spinlock.h
View File

@ -201,7 +201,7 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw)
static inline int __raw_read_trylock(raw_rwlock_t *rw)
{
unsigned long tmp tmp2 = 1;
unsigned long tmp, tmp2 = 1;
__asm__ __volatile__(
"1: ldrex %0, [%2]\n"

8
include/asm-generic/audit_read.h Normal file
View File

@ -0,0 +1,8 @@
__NR_readlink,
__NR_quotactl,
__NR_listxattr,
__NR_llistxattr,
__NR_flistxattr,
__NR_getxattr,
__NR_lgetxattr,
__NR_fgetxattr,

11
include/asm-generic/audit_write.h Normal file
View File

@ -0,0 +1,11 @@
#include <asm-generic/audit_dir_write.h>
__NR_acct,
__NR_swapon,
__NR_quotactl,
__NR_truncate,
#ifdef __NR_truncate64
__NR_truncate64,
#endif
#ifdef __NR_bind
__NR_bind, /* bind can affect fs object only in one way... */
#endif

11
include/linux/audit.h
View File

@ -132,6 +132,10 @@
#define AUDIT_CLASS_DIR_WRITE_32 1
#define AUDIT_CLASS_CHATTR 2
#define AUDIT_CLASS_CHATTR_32 3
#define AUDIT_CLASS_READ 4
#define AUDIT_CLASS_READ_32 5
#define AUDIT_CLASS_WRITE 6
#define AUDIT_CLASS_WRITE_32 7
/* This bitmask is used to validate user input. It represents all bits that
* are currently used in an audit field constant understood by the kernel.
@ -177,6 +181,7 @@
#define AUDIT_EXIT 103
#define AUDIT_SUCCESS 104 /* exit >= 0; value ignored */
#define AUDIT_WATCH 105
#define AUDIT_PERM 106
#define AUDIT_ARG0 200
#define AUDIT_ARG1 (AUDIT_ARG0+1)
@ -252,6 +257,11 @@
#define AUDIT_ARCH_V850 (EM_V850|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_PERM_EXEC 1
#define AUDIT_PERM_WRITE 2
#define AUDIT_PERM_READ 4
#define AUDIT_PERM_ATTR 8
struct audit_status {
__u32 mask; /* Bit mask for valid entries */
__u32 enabled; /* 1 = enabled, 0 = disabled */
@ -314,6 +324,7 @@ struct mqstat;
#define AUDITSC_FAILURE 2
#define AUDITSC_RESULT(x) ( ((long)(x))<0?AUDITSC_FAILURE:AUDITSC_SUCCESS )
extern int __init audit_register_class(int class, unsigned *list);
extern int audit_classify_syscall(int abi, unsigned syscall);
#ifdef CONFIG_AUDITSYSCALL
/* These are defined in auditsc.c */
/* Public API */

2
include/linux/mmc/host.h
View File

@ -77,7 +77,7 @@ struct mmc_host {
struct device *dev;
struct class_device class_dev;
int index;
struct mmc_host_ops *ops;
const struct mmc_host_ops *ops;
unsigned int f_min;
unsigned int f_max;
u32 ocr_avail;

2
include/linux/mmc/mmc.h
View File

@ -105,6 +105,8 @@ extern int mmc_wait_for_cmd(struct mmc_host *, struct mmc_command *, int);
extern int mmc_wait_for_app_cmd(struct mmc_host *, unsigned int,
struct mmc_command *, int);
extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *, int);
extern int __mmc_claim_host(struct mmc_host *host, struct mmc_card *card);
static inline void mmc_claim_host(struct mmc_host *host)

6
kernel/audit.c
View File

@ -1028,6 +1028,9 @@ void audit_log_hex(struct audit_buffer *ab, const unsigned char *buf,
struct sk_buff *skb;
static const unsigned char *hex = "0123456789ABCDEF";
if (!ab)
return;
BUG_ON(!ab->skb);
skb = ab->skb;
avail = skb_tailroom(skb);
@ -1060,6 +1063,9 @@ static void audit_log_n_string(struct audit_buffer *ab, size_t slen,
unsigned char *ptr;
struct sk_buff *skb;
if (!ab)
return;
BUG_ON(!ab->skb);
skb = ab->skb;
avail = skb_tailroom(skb);

1
kernel/audit.h
View File

@ -104,6 +104,7 @@ static inline int audit_hash_ino(u32 ino)
return (ino & (AUDIT_INODE_BUCKETS-1));
}
extern int audit_match_class(int class, unsigned syscall);
extern int audit_comparator(const u32 left, const u32 op, const u32 right);
extern int audit_compare_dname_path(const char *dname, const char *path,
int *dirlen);

37
kernel/auditfilter.c
View File

@ -302,6 +302,15 @@ int __init audit_register_class(int class, unsigned *list)
return 0;
}
int audit_match_class(int class, unsigned syscall)
{
if (unlikely(syscall >= AUDIT_BITMASK_SIZE * sizeof(__u32)))
return 0;
if (unlikely(class >= AUDIT_SYSCALL_CLASSES || !classes[class]))
return 0;
return classes[class][AUDIT_WORD(syscall)] & AUDIT_BIT(syscall);
}
/* Common user-space to kernel rule translation. */
static inline struct audit_entry *audit_to_entry_common(struct audit_rule *rule)
{
@ -404,6 +413,7 @@ static struct audit_entry *audit_rule_to_entry(struct audit_rule *rule)
case AUDIT_PERS:
case AUDIT_ARCH:
case AUDIT_MSGTYPE:
case AUDIT_PPID:
case AUDIT_DEVMAJOR:
case AUDIT_DEVMINOR:
case AUDIT_EXIT:
@ -413,6 +423,10 @@ static struct audit_entry *audit_rule_to_entry(struct audit_rule *rule)
case AUDIT_ARG2:
case AUDIT_ARG3:
break;
case AUDIT_PERM:
if (f->val & ~15)
goto exit_free;
break;
case AUDIT_INODE:
err = audit_to_inode(&entry->rule, f);
if (err)
@ -567,6 +581,10 @@ static struct audit_entry *audit_data_to_entry(struct audit_rule_data *data,
entry->rule.buflen += f->val;
entry->rule.filterkey = str;
break;
case AUDIT_PERM:
if (f->val & ~15)
goto exit_free;
break;
default:
goto exit_free;
}
@ -913,7 +931,7 @@ static void audit_update_watch(struct audit_parent *parent,
}
ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_CONFIG_CHANGE);
audit_log_format(ab, "audit updated rules specifying watch=");
audit_log_format(ab, "audit updated rules specifying path=");
audit_log_untrustedstring(ab, owatch->path);
audit_log_format(ab, " with dev=%u ino=%lu\n", dev, ino);
audit_log_end(ab);
@ -936,19 +954,28 @@ static void audit_remove_parent_watches(struct audit_parent *parent)
struct audit_watch *w, *nextw;
struct audit_krule *r, *nextr;
struct audit_entry *e;
struct audit_buffer *ab;
mutex_lock(&audit_filter_mutex);
parent->flags |= AUDIT_PARENT_INVALID;
list_for_each_entry_safe(w, nextw, &parent->watches, wlist) {
list_for_each_entry_safe(r, nextr, &w->rules, rlist) {
e = container_of(r, struct audit_entry, rule);
ab = audit_log_start(NULL, GFP_KERNEL, AUDIT_CONFIG_CHANGE);
audit_log_format(ab, "audit implicitly removed rule path=");
audit_log_untrustedstring(ab, w->path);
if (r->filterkey) {
audit_log_format(ab, " key=");
audit_log_untrustedstring(ab, r->filterkey);
} else
audit_log_format(ab, " key=(null)");
audit_log_format(ab, " list=%d", r->listnr);
audit_log_end(ab);
list_del(&r->rlist);
list_del_rcu(&e->list);
call_rcu(&e->rcu, audit_free_rule_rcu);
audit_log(NULL, GFP_KERNEL, AUDIT_CONFIG_CHANGE,
"audit implicitly removed rule from list=%d\n",
AUDIT_FILTER_EXIT);
}
audit_remove_watch(w);
}

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